Issued Patents All Time
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6457164 | Hetergeneous method for determining module placement in FPGAs | L. James Hwang, Eric F. Dellinger, Sundararajarao Mohan, Cameron Patterson, Ralph D. Wittig | 2002-09-24 |
| 6430732 | Method for structured layout in a hardware description language | L. James Hwang, Cameron Patterson | 2002-08-06 |
| 6292925 | Context-sensitive self implementing modules | Eric F. Dellinger, L. James Hwang, Sundararajarao Mohan, Ralph D. Wittig | 2001-09-18 |
| 6260182 | Method for specifying routing in a logic module by direct module communication | Sundararajarao Mohan, Eric F. Dellinger, L. James Hwang, Ralph D. Wittig | 2001-07-10 |
| 6243851 | Heterogeneous method for determining module placement in FPGAs | L. James Hwang, Eric F. Dellinger, Sundararajarao Mohan, Cameron Patterson, Ralph D. Wittig | 2001-06-05 |
| 6237129 | Method for constraining circuit element positions in structured layouts | Cameron Patterson, Eric F. Dellinger, L. James Hwang, Sundararajarao Mohan, Ralph D. Wittig | 2001-05-22 |
| 6216258 | FPGA modules parameterized by expressions | Sundararajarao Mohan, Eric F. Dellinger, L. James Hwang, Ralph D. Wittig | 2001-04-10 |