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Re-targetable interface for data exchange between heterogeneous systems and accelerator abstraction into software instructions |
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Software-defined buffer/transposer for general matrix multiplication in a programmable IC |
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Inline image preprocessing for convolution operations using a matrix multiplier on an integrated circuit |
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Software-driven design optimization for fixed-point multiply-accumulate circuitry |
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Sparse matrix processing circuitry |
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Software-driven design optimization for mapping between floating-point and fixed-point multiply accumulators |
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Data format suitable for fast massively parallel general matrix multiplication in a programmable IC |
Jindrich Zejda, Elliott Delaye, Ashish Sirasao, Yongjun Wu |
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Inline image preprocessing for convolution operations using a matrix multiplier on an integrated circuit |
Ashish Sirasao, Elliott Delaye, Ehsan Ghasemi |
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Timing closure of circuit designs for integrated circuits |
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Software-defined memory bandwidth reduction by hierarchical stream buffering for general matrix multiplication in a programmable IC |
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Neural network based physical synthesis for circuit designs |
Sabyasachi Das, Prabal Basu |
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Fanout optimization to facilitate timing improvement in circuit designs |
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Programmable integrated circuit design flow using timing-driven pipeline analysis |
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Ruibing Lu, Zhiyong Wang, Sabyasachi Das |
2017-05-09 |
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Resource mapping of functional areas on an integrated circuit |
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