Issued Patents 2024
Showing 1–14 of 14 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12183804 | RF switch device with a sidewall spacer having a low dielectric constant | — | 2024-12-31 |
| 12165911 | Method for forming a semiconductor-on-insulator (SOI) substrate | Chia-Shiung Tsai, Jiech-Fun Lu, Kuan-Liang Liu, Shih Pei Chou, Yu-Hung Cheng +1 more | 2024-12-10 |
| 12148756 | Selective polysilicon growth for deep trench polysilicon isolation structure | Yu-Hung Cheng, Po-Wei Liu, Yeur-Luen Tu, Yu-Chun Chang | 2024-11-19 |
| 12119267 | Method for manufacturing semiconductor structure | Chen Cheng Chou, Shiu-Ko JangJian | 2024-10-15 |
| 12100767 | Strained gate semiconductor device having an interlayer dielectric doped with large species material | Chii-Ming Wu, Shiu-Ko JangJian, Kun-Tzu Lin, Lan Chang | 2024-09-24 |
| 12087206 | Color adjustment device, display and color adjustment method | Chang Lin Liou, Chih Hao Lo | 2024-09-10 |
| 12074036 | Multi-layered polysilicon and oxygen-doped polysilicon design for RF SOI trap-rich poly layer | Yu-Hung Cheng, Chen-Hao Chiang, Alexander Kalnitsky, Yeur-Luen Tu, Eugene Chen | 2024-08-27 |
| 12062539 | Semiconductor-on-insulator (SOI) substrate and method for forming | Chia-Ta Hsieh, Kuo-Wei Wu, Yu-Chun Chang, Ying Ling Tseng | 2024-08-13 |
| 12040221 | Fabrication method of metal-free SOI wafer | Yu-Hung Cheng, Pu Chen, Po-Jung Chiang, Ru-Liang Lee, Victor Lu +4 more | 2024-07-16 |
| 11984477 | RFSOI semiconductor structures including a nitrogen-doped charge-trapping layer and methods of manufacturing the same | Chui Hua Chen | 2024-05-14 |
| 11955496 | Back-side deep trench isolation structure for image sensor | Kuo-Hwa Tzeng, Yeur-Luen Tu | 2024-04-09 |
| 11929379 | Conductive contact for ion through-substrate via | Min-Ying Tsai, Yeur-Luen Tu | 2024-03-12 |
| 11923235 | Method for forming semiconductor device having isolation structures with different thicknesses | Chii-Ming Wu, Sen-Hong Syue, Cheng-Po Chau | 2024-03-05 |
| 11901435 | RF switch device with a sidewall spacer having a low dielectric constant | — | 2024-02-13 |