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Threshold voltage modulation for gate-all-around FET architecture |
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| 12104243 |
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Amorphous silicon-based scavenging and sealing EOT |
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| 12062545 |
Fluorine-free tungsten ALD for dielectric selectivity improvement |
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PMOS high-k metal gates |
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| 12022650 |
Low resistivity DRAM buried word line stack |
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Metal based hydrogen barrier |
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| 11997849 |
V-NAND stacks with dipole regions |
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| 11996455 |
P-type dipole for P-FET |
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| 11961734 |
Treatments to enhance material structures |
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| 11955332 |
Treatments to enhance material structures |
Yixiong Yang, Jacqueline S. Wrench, Yong Yang, Steven C. H. Hung |
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| 11932939 |
Lids and lid assembly kits for atomic layer deposition chambers |
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| 11908914 |
Methods of forming semiconductor structures |
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| 11887855 |
Methods for depositing fluorine/carbon-free conformal tungsten |
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Integrated dipole flow for transistor |
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| 11887856 |
Enhanced spatial ALD of metals through controlled precursor mixing |
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| 11869806 |
Methods of forming molybdenum contacts |
Seshadri Ganguli, Jacqueline S. Wrench, Yixiong Yang, Yong Yang |
2024-01-09 |
