Issued Patents 2023
Showing 101–125 of 144 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11637196 | Semiconductor structure and method of manufacturing the same | Chi-Yi Chuang, Ching-Wei Tsai, Kuan-Lun Cheng | 2023-04-25 |
| 11637195 | Metal gate patterning process including dielectric Fin formation | Lung-Kun Chu, Mao-Lin Huang, Chung-Wei Hsu, Jia-Ni Yu, Kuo-Cheng Chiang | 2023-04-25 |
| 11637186 | Field effect transistor having gate contact and source/drain contact separated by a gap | Jia-Chuan You, Chia-Hao Chang, Tien-Lu Lin, Yu-Ming Lin | 2023-04-25 |
| 11637102 | Gate isolation for multigate device | Kuo-Cheng Chiang, Shi Ning Ju, Guan-Lin Chen, Kuan-Ting Pan | 2023-04-25 |
| 11637042 | Self-aligned metal gate for multigate device | Guan-Lin Chen, Kuo-Cheng Chiang, Kuan-Lun Cheng, Ching-Wei Tsai, Shi Ning Ju +1 more | 2023-04-25 |
| 11631638 | Semiconductor structure having an anchor-shaped backside via | Chun-Yuan Chen, Huan-Chieh Su, Cheng-Chi Chuang | 2023-04-18 |
| 11631770 | Structure and formation method of semiconductor device with stressor | Shi Ning Ju, Kuo-Cheng Chiang, Guan-Lin Chen | 2023-04-18 |
| 11631749 | Method of fabricating semiconductor device | Jia-Chuan You, Chia-Hao Chang, Tien-Lu Lin, Yu-Ming Lin | 2023-04-18 |
| 11626327 | Methods of fabricating semiconductor devices with mixed threshold voltages boundary isolation of multiple gates and structures formed thereby | Kuo-Cheng Chiang, Chung-Wei Hsu, Lung-Kun Chu, Jia-Ni Yu, Mao-Lin Huang | 2023-04-11 |
| 11626509 | Semiconductor device and manufacturing method thereof | Kuo-Cheng Ching, Shi Ning Ju, Kuan-Ting Pan, Kuan-Lun Cheng | 2023-04-11 |
| 11626504 | Fin field effect transistor (FinFET) device structure | Sai-Hooi Yeong, Chi On Chui, Bo-Feng Young, Bo-Yu Lai, Kuan-Lun Cheng | 2023-04-11 |
| 11626485 | Field effect transistor and method | Lung-Kun Chu, Mao-Lin Huang, Chung-Wei Hsu, Jia-Ni Yu, Kuo-Cheng Chiang +1 more | 2023-04-11 |
| 11626402 | Semiconductor device structure | Kuo-Cheng Chiang, Shi Ning Ju, Kuan-Ting Pan, Zhi-Chang Lin | 2023-04-11 |
| 11621197 | Semiconductor device with gate cut feature and method for forming the same | Huan-Chieh Su, Li-Zhen Yu, Chun-Yuan Chen, Lo-Heng Chang, Cheng-Chi Chuang +1 more | 2023-04-04 |
| 11621352 | Semiconductor device and method of manufacturing the same | Jia-Chuan You, Chia-Hao Chang, Yu-Ming Lin | 2023-04-04 |
| 11621323 | Fill fins for semiconductor devices | Kuo-Cheng Ching, Kuan-Lun Cheng | 2023-04-04 |
| 11621224 | Contact features and methods of fabricating the same in semiconductor devices | Li-Zhen Yu, Chia-Hao Chang, Cheng-Chi Chuang, Yu-Ming Lin | 2023-04-04 |
| 11621195 | Semiconductor device and method of manufacturing the same | Kuan-Ting Pan, Kuo-Cheng Chiang, Yi-Bo Liao, Yi-Ruei Jhan | 2023-04-04 |
| 11616062 | Gate isolation for multigate device | Shi Ning Ju, Kuo-Cheng Chiang, Kuan-Ting Pan, Zhi-Chang Lin, Shih-Cheng Chen | 2023-03-28 |
| 11616143 | Semiconductor devices with backside power rail and methods of fabrication thereof | Chun-Yuan Chen, Huan-Chieh Su, Pei-Yu Wang | 2023-03-28 |
| 11615962 | Semiconductor structures and methods thereof | Chung-Wei Hsu, Kuo-Cheng Chiang, Mao-Lin Huang, Lung-Kun Chu, Jia-Ni Yu +1 more | 2023-03-28 |
| 11610805 | Replacement material for backside gate cut feature | Wang-Chun Huang, Yu-Xuan Huang, Hou-Yu Chen, Kuan-Lun Cheng | 2023-03-21 |
| 11610983 | Epitaxial features confined by dielectric fins and spacers | Kuo-Cheng Chiang, Kuan-Lun Cheng | 2023-03-21 |
| 11610977 | Methods of forming nano-sheet-based devices having inner spacer structures with different widths | Jui-Chien Huang, Kuo-Cheng Chiang, Shi Ning Ju, Guan-Lin Chen | 2023-03-21 |
| 11605736 | Low-capacitance structures and processes | Jia-Chuan You, Chia-Hao Chang, Tien-Lu Lin, Yu-Ming Lin | 2023-03-14 |