| 11837458 |
Substrate with gradiated dielectric for reducing impedance mismatch |
Jackson Chung Peng Kong, Ping Ping Ooi, Kooi Chi Ooi |
2023-12-05 |
| 11798894 |
Devices and methods for signal integrity protection technique |
Jackson Chung Peng Kong, Khang Choong Yong, Kooi Chi Ooi, Min Suet Lim |
2023-10-24 |
| 11758662 |
Three dimensional foldable substrate with vertical side interface |
Tin Poay Chuah, Jackson Chung Peng Kong |
2023-09-12 |
| 11676910 |
Embedded reference layers for semiconductor package substrates |
Seok Ling Lim, Jenny Shio Yin Ong, Jackson Chung Peng Kong, Kooi Chi Ooi |
2023-06-13 |
| 11652026 |
Micro through-silicon via for transistor density scaling |
Choong Kooi Chee, Jackson Chung Peng Kong, Wai Ling Lee, Tat Hin Tan |
2023-05-16 |
| 11639623 |
Micro-hinge for an electronic device |
Howe Yin Loo, Min Suet Lim, Jackson Chung Peng Kong, Poh Tat Oh |
2023-05-02 |
| 11574877 |
Semiconductor miniaturization through component placement on stepped stiffener |
Jenny Shio Yin Ong, Seok Ling Lim, Jackson Chung Peng Kong |
2023-02-07 |
| 11562963 |
Stacked semiconductor package and method of forming the same |
Chin Lee Kuan, Jackson Chung Peng Kong, Sameer Shekhar, Amit Jain |
2023-01-24 |
| 11562954 |
Frame-array interconnects for integrated-circuit packages |
Seok Ling Lim, Jenny Shio Yin Ong, Jackson Chung Peng Kong |
2023-01-24 |
| 11557552 |
3D trench reference planes for integrated-circuit die packages |
Chin Lee Kuan, Jackson Chung Peng Kong |
2023-01-17 |
| 11545434 |
Vertical die-to-die interconnects bridge |
Yang Liang Poh, Kooi Chi Ooi |
2023-01-03 |