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Selective recessing to form a fully aligned via |
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Pillar-based memory hardmask smoothing and stress reduction |
Michael Rizzolo, Ashim Dutta, Dominik Metzler |
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| 11710658 |
Structure and method to improve FAV RIE process margin and Electromigration |
Benjamin D. Briggs, Joe Lee |
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Dual damascene with short liner |
Koichi Motoyama, Oscar van der Straten, Joseph F. Maniscalco, Alexander Reznicek, Raghuveer R. Patlolla |
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| 11615988 |
FinFET devices |
Veeraraghavan S. Basker, Kangguo Cheng, Junli Wang |
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Non volatile resistive memory logic device |
Hsueh-Chung Chen, Mary Claire Silvestre, Soon-Cheon Seo, Chi-Chun Liu, Fee Li Lie +2 more |
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Dielectric retention and method of forming memory pillar |
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