Issued Patents 2023
Showing 1–19 of 19 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11855180 | Gate induced drain leakage reduction in FinFETs | Alexander Reznicek, Takashi Ando, Ruilong Xie | 2023-12-26 |
| 11842998 | Semiconductor device and method of forming the semiconductor device | Robin Hsin Kuo Chao, Hemanth Jagannathan, Choonghyun Lee, Chun Wing Yeung | 2023-12-12 |
| 11830877 | Co-integrated channel and gate formation scheme for nanosheet transistors having separately tuned threshold voltages | Takashi Ando, Choonghyun Lee, Pouya Hashemi, Alexander Reznicek | 2023-11-28 |
| 11810828 | Transistor boundary protection using reversible crosslinking reflow | Jing Guo, Ekmini Anuja De Silva, Indira Seshadri, Su Chen Fan | 2023-11-07 |
| 11805350 | Point-to-multipoint data transmission method and device | Yuhong Zhu, Liang Wang, Yong Zheng | 2023-10-31 |
| 11798867 | Half buried nFET/pFET epitaxy source/drain strap | Ruilong Xie, Alexander Reznicek, Bruce B. Doris | 2023-10-24 |
| 11778363 | Audio data transmission method applied to switching between single-earbud mode and double-earbud mode of TWS headset and device | Yuhong Zhu, Liang Wang, Yong Zheng | 2023-10-03 |
| 11777034 | Hybrid complementary field effect transistor device | Ruilong Xie, Chen Zhang, Junli Wang, Pietro Montanini | 2023-10-03 |
| 11756960 | Multi-threshold voltage gate-all-around transistors | Takashi Ando, Choonghyun Lee | 2023-09-12 |
| 11756996 | Formation of wrap-around-contact for gate-all-around nanosheet FET | Takashi Ando, Pouya Hashemi, Choonghyun Lee, Alexander Reznicek | 2023-09-12 |
| 11742409 | Replacement-channel fabrication of III-V nanosheet devices | Choonghyun Lee, Chun Wing Yeung, Robin Hsin Kuo Chao, Heng Wu | 2023-08-29 |
| 11735628 | Nanosheet metal-oxide semiconductor field effect transistor with asymmetric threshold voltage | Takashi Ando, Ruilong Xie, Alexander Reznicek | 2023-08-22 |
| 11735593 | Gate stack dipole compensation for threshold voltage definition in transistors | Ruqiang Bao, Koji Watanabe, Jing Guo | 2023-08-22 |
| 11735480 | Transistor having source or drain formation assistance regions with improved bottom isolation | Ruilong Xie, Alexander Reznicek, Effendi Leobandung | 2023-08-22 |
| 11710699 | Complementary FET (CFET) buried sidewall contact with spacer foot | Ruilong Xie, Reinaldo Vega, Kangguo Cheng | 2023-07-25 |
| 11688741 | Gate-all-around devices with isolated and non-isolated epitaxy regions for strain engineering | Andrew M. Greene, Julien Frougier, Sung-Dae Suk, Veeraraghavan S. Basker, Ruilong Xie | 2023-06-27 |
| 11653398 | Bluetooth connection method and device | Zhichao Chen, Liang Wang, Yuhong Zhu, Yong Zheng | 2023-05-16 |
| 11587837 | Oxygen vacancy passivation in high-k dielectrics for vertical transport field effect transistor | Choonghyun Lee, Takashi Ando, Alexander Reznicek | 2023-02-21 |
| 11575023 | Secure chip identification using random threshold voltage variation in a field effect transistor structure as a physically unclonable function | Clint Jason Oteri, Alexander Reznicek, Bahman Hekmatshoartabari, Ruilong Xie | 2023-02-07 |