Issued Patents 2021
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11211324 | Via contact patterning method to increase edge placement error margin | Mohit K. HARAN, Daniel James Bahr, Deepak S. Rao, Marvin Young Paik, Seungdo An +6 more | 2021-12-28 |
| 11171043 | Plug and trench architectures for integrated circuits and methods of manufacture | Marvin Young Paik, Hyunsoo Park, Mohit K. HARAN, Alexander F. Kaplan, Ruth A. Brain | 2021-11-09 |
| 11145541 | Conductive via and metal line end fabrication and structures resulting therefrom | Reken Patel, Hyunsoo Park, Mohit K. HARAN, Debashish Basu, Curtis W. Ward +1 more | 2021-10-12 |
| 11107786 | Pattern decomposition lithography techniques | Hossam A. Abdallah, Elliot N. Tan, Swaminathan Sivakumar, Oleg Golonzka, Robert M. Bigwood | 2021-08-31 |
| 10991599 | Self-aligned via and plug patterning for back end of line (BEOL) interconnects | Paul A. Nyhus | 2021-04-27 |
| 10910265 | Gate aligned contact and method to fabricate same | Oleg Golonzka, Swaminathan Sivakumar, Tahir Ghani | 2021-02-02 |
| 10892223 | Advanced lithography and self-assembled devices | Richard E. Schenker, Robert L. Bristol, Kevin Lin, Florian Gstrein, James M. Blackwell +6 more | 2021-01-12 |