IM

Ilyas Mohammed

XC Xcelsis: 13 patents #3 of 16Top 20%
IN Invensas: 5 patents #5 of 37Top 15%
TE Tessera: 4 patents #3 of 99Top 4%
IT Invensas Bonding Technologies: 2 patents #10 of 14Top 75%
PE Perceive: 1 patents #4 of 6Top 70%
Overall (2020): #1,293 of 565,922Top 1%
25
Patents 2020

Issued Patents 2020

Patent #TitleCo-InventorsDate
10863127 Compressive sensing based image capture using multi-lens array 2020-12-08
10852545 Head mounted viewer for AR and VR scenes Rajesh Katkar, Belgacem Haba 2020-12-01
10833044 Package-on-package assembly with wire bonds to encapsulation surface Hiroaki Sato, Teck-Gyu Kang, Belgacem Haba, Philip R. Osborn, Wei-Shun Wang +6 more 2020-11-10
10813214 Cavities containing multi-wiring structures and devices Cyprian Emeka Uzoh, Craig Mitchell, Belgacem Haba 2020-10-20
10802285 Remote optical engine for virtual reality or augmented reality headsets Belgacem Haba, Rajesh Katkar 2020-10-13
10804151 Systems and methods for producing flat surfaces in interconnect structures Cyprian Emeka Uzoh, Vage Oganesian 2020-10-13
10748824 Probe methodology for ultrafine pitch interconnects Javier A. Delacruz, Paul M. Enquist, Gaius Gillman Fountain, Jr. 2020-08-18
10748858 High yield substrate assembly Liang Wang, Masud Beroz 2020-08-18
10734759 Configurable smart object system with magnetic contacts and magnetic assembly Belgacem Haba, Gabriel Z. Guevara, Min Tao 2020-08-04
10672663 3D chip sharing power circuit Javier A. Delacruz, Steven Teig, Eric Nequist 2020-06-02
10672743 3D Compute circuit with high density z-axis interconnects Steven Teig, Kenneth Duong, Javier A. Delacruz 2020-06-02
10672744 3D compute circuit with high density Z-axis interconnects Steven Teig, Kenneth Duong, Javier A. Delacruz 2020-06-02
10672745 3D processor Steven Teig, Kenneth Duong, Javier A. Delacruz 2020-06-02
10600735 3D chip sharing data bus Javier A. Delacruz, Steven Teig 2020-03-24
10600780 3D chip sharing data bus circuit Javier A. Delacruz, Steven Teig 2020-03-24
10600691 3D chip sharing power interconnect layer Javier A. Delacruz, Steven Teig 2020-03-24
10593643 Package-on-package assembly with wire bonds to encapsulation surface Hiroaki Sato, Teck-Gyu Kang, Belgacem Haba, Philip R. Osborn, Wei-Shun Wang +6 more 2020-03-17
10593563 Fan-out wafer level package with resist vias Belgacem Haba, Rajesh Katkar 2020-03-17
10593667 3D chip with shielded clock lines Javier A. Delacruz, Steven Teig 2020-03-17
10593651 Systems and methods for flash stacking Belgacem Haba, Javier A. Delacruz 2020-03-17
10586786 3D chip sharing clock interconnect layer Javier A. Delacruz, Steven Teig, Eric Nequist 2020-03-10
10580757 Face-to-face mounted IC dies with orthogonal top interconnect layers Eric Nequist, Steven Teig, Javier A. Delacruz, Laura Mirkarimi 2020-03-03
10580735 Stacked IC structure with system level wiring on multiple sides of the IC die Steven Teig, Javier A. Delacruz 2020-03-03
10559494 Microelectronic elements with post-assembly planarization Vage Oganesian, Belgacem Haba, Craig Mitchell, Piyush Savalia 2020-02-11
10529634 Probe methodology for ultrafine pitch interconnects Javier A. Delacruz, Paul M. Enquist, Gaius Gillman Fountain, Jr. 2020-01-07