Issued Patents 2020
Showing 1–6 of 6 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10879162 | Integrated fan-out packages | Shin-Puu Jeng, Dai-Jang Chen, Hsiang-Tai Lu, Chih-Hsien Lin, Shih-Ting Hung +1 more | 2020-12-29 |
| 10867924 | Semiconductor package with redistribution structure and pre-made substrate on opposing sides for dual-side metal routing | Shin-Puu Jeng, Shuo-Mao Chen, Po-Yao Chuang, Feng-Cheng Hsu, Po-Yao Lin | 2020-12-15 |
| 10861801 | Wafer level package (WLP) and method for forming the same | Shin-Puu Jeng | 2020-12-08 |
| 10763239 | Multi-chip wafer level packages and methods of forming the same | Shuo-Mao Chen, Feng-Cheng Hsu, Han-Hsiang Huang, Shin-Puu Jeng, Hsiao-Wen Lee | 2020-09-01 |
| 10748882 | Structure and formation method for chip package | Jui-Pin Hung, Cheng-Lin Huang, Shin-Puu Jeng | 2020-08-18 |
| 10529671 | Package structure and method for forming the same | Hsiao-Wen Lee, Shin-Puu Jeng | 2020-01-07 |