Issued Patents 2019
Showing 1–12 of 12 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10481200 | Semiconductor device test apparatuses comprising at least one test site having an array of pockets | Michel Koopmans, James M. Derderian | 2019-11-19 |
| 10424531 | Method for manufacturing a semiconductor device assembly with through-mold cooling channel formed in encapsulant | Bradley R. Bitz, Xiao Li | 2019-09-24 |
| 10410882 | Solder bond site including an opening with discontinuous profile | Dale Arnold | 2019-09-10 |
| 10410879 | Uniform back side exposure of through-silicon vias | Wayne H. Huang | 2019-09-10 |
| 10403591 | Chip package assembly with enhanced interconnects and method for fabricating the same | — | 2019-09-03 |
| 10319606 | Chip package assembly with enhanced interconnects and method for fabricating the same | Tien-Yu Lee, Henley Liu, Ivor G. Barber, Suresh Ramalingam | 2019-06-11 |
| 10297577 | Semiconductor device assembly with heat transfer structure formed from semiconductor material | Sameer S. Vadhavkar, James M. Derderian | 2019-05-21 |
| 10262922 | Semiconductor device having through-silicon-via and methods of forming the same | Wayne H. Huang | 2019-04-16 |
| 10256216 | Interconnect structures with intermetallic palladium joints and associated systems and methods | — | 2019-04-09 |
| 10236229 | Stacked silicon package assembly having conformal lid | — | 2019-03-19 |
| 10224313 | Interconnect structures with intermetallic palladium joints and associated systems and methods | — | 2019-03-05 |
| 10170389 | Stacked semiconductor die assemblies with multiple thermal paths and associated systems and methods | Steven K. Groothuis, Jian Li, Haojun Zhang, Paul A. Silvestri, Xiao Li +3 more | 2019-01-01 |