Issued Patents 2019
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10510669 | Multi-chip package and method of providing die-to-die interconnects in same | Chia-Pin Chiu, Aleksandar Aleksov, Hinmeng Au, Stefanie M. Lotz, Johanna M. Swan +1 more | 2019-12-17 |
| 10475736 | Via architecture for increased density interface | Aleksandar Aleksov, Arnab Sarkar, Arghya Sain, Kristof Darmawikarta, Prashant Parmar +3 more | 2019-11-12 |
| 10381291 | Lithographacally defined vias for organic package substrate scaling | Adel A. Elsherbini, Brandon M. Rawlings, Aleksandar Aleksov, Feras Eid, Javier Soto | 2019-08-13 |
| 10361142 | Dual-sided die packages | Feras Eid, Adel A. Elsherbini, Johanna M. Swan, Don Nelson | 2019-07-23 |
| 10304686 | Electronic devices with components formed by late binding using self-assembled monolayers | Sasha N. Oster, Fay Hua, Telesphor Kamgaing, Adel A. Elsherbini, Johanna M. Swan | 2019-05-28 |
| 10186465 | Package-integrated microchannels | Feras Eid, Adel A. Elsherbini, Yidnekachew S. Mekonnen, Krishna Bharath, Mathew J. Manusharow +2 more | 2019-01-22 |
| 10187998 | Zero-misalignment via-pad structures | Brandon M. Rawlings | 2019-01-22 |