Issued Patents 2017
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9831117 | Self-aligned double spacer patterning process | Yung-Hsu Wu, Cheng-Hsiung Tsai, Chung-Ju Lee, Tien-I Bao, Shau-Lin Shue | 2017-11-28 |
| 9818695 | Material and process for copper barrier layer | Chung-Ju Lee | 2017-11-14 |
| 9806026 | Self repairing process for porous dielectric materials | Chung-Ju Lee, Tien-I Bao | 2017-10-31 |
| 9768031 | Semiconductor device manufacturing methods | Chung-Ju Lee, Cheng-Hsiung Tsai | 2017-09-19 |
| 9735048 | Semiconductor device and fabricating process for the same | Chien-Hua Huang, Chung-Ju Lee | 2017-08-15 |
| 9728408 | Method of semiconductor integrated circuit fabrication | Chung-Ju Lee, Chih-Tsung Shih, Jeng-Horng Chen, Shinn-Sheng Yu, Anthony Yen | 2017-08-08 |
| 9679803 | Method for forming different patterns in a semiconductor structure using a single mask | Chung-Ju Lee, Chih-Tsung Shih, Yen-Cheng Lu | 2017-06-13 |
| 9646932 | Method for forming interconnect structure that avoids via recess | Chao-Hsien Peng, Hsiang-Huan Lee, Shau-Lin Shue | 2017-05-09 |
| 9607850 | Self-aligned double spacer patterning process | Cheng-Hsiung Tsai, Yung-Hsu Wu, Chung-Ju Lee, Tien-I Bao, Shau-Lin Shue | 2017-03-28 |
| 9601346 | Spacer-damage-free etching | Chung-Ju Lee, Yung-Hsu Wu | 2017-03-21 |
| 9576893 | Semiconductor structure and semiconductor fabricating process for the same | Chung-Ju Lee | 2017-02-21 |
| 9576851 | Interconnect structure and methods of making same | Chung-Ju Lee, Tsung-Jung Tsai | 2017-02-21 |
| 9558927 | Wet cleaning method for cleaning small pitch features | Chien-Hua Huang, Chung-Ju Lee | 2017-01-31 |