Issued Patents 2017
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9818751 | Methods of forming buried vertical capacitors and structures formed thereby | Rajashree Baskaran, Kimin Jun | 2017-11-14 |
| 9793373 | Field effect transistor structure with abrupt source/drain junctions | Anand S. Murthy, Robert S. Chau, Chia-Hong Jan, Paul Packan | 2017-10-17 |
| 9761514 | Substrate for integrated circuit devices including multi-layer glass core and methods of making the same | Qing Ma, Chuan Hu | 2017-09-12 |
| 9721898 | Methods of forming under device interconnect structures | Don Nelson, M. Clair Webb, Kimin Jun, Il-Seok Son | 2017-08-01 |
| 9685436 | Monolithic three-dimensional (3D) ICs with local inter-level interconnects | Kimin Jun, M. Clair Webb, Donald W. Nelson | 2017-06-20 |
| 9646972 | Methods of forming buried vertical capacitors and structures formed thereby | Rajashree Baskaran, Kimin Jun | 2017-05-09 |
| 9640634 | Field effect transistor structure with abrupt source/drain junctions | Anand S. Murthy, Robert S. Chau, Chia-Hong Jan, Paul Packan | 2017-05-02 |
| 9590051 | Heterogeneous layer device | Kimin Jun | 2017-03-07 |