Patent Leaderboard
USPTO Patent Rankings Data through Dec 31, 2025
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Anand S. Murthy — 16 Patents in 2017

Intel: 16 patents #71 of 5,604Top 2%
Portland, OR: #33 of 1,767 inventorsTop 2%
Oregon: #53 of 4,319 inventorsTop 2%
Overall (2017): #2,753 of 506,227Top 1%
16 Patents 2017

Issued Patents 2017

Showing 1–16 of 16 patents

Patent #TitleCo-InventorsDateApprox Value ⓘ
9842928 Tensile source drain III-V transistors for mobility improved n-MOS Glenn A. Glass, Chandra S. Mohapatra 2017-12-12 $18,742,000
9812524 Nanowire transistor devices and forming techniques Glenn A. Glass, Kelin J. Kuhn, Seiyon Kim, Daniel B. Aubertine 2017-11-07 $13,901,000
9793373 Field effect transistor structure with abrupt source/drain junctions Robert S. Chau, Patrick Morrow, Chia-Hong Jan, Paul Packan 2017-10-17 $9,876,000
9754940 Self-aligned contact metallization for reduced contact resistance Glenn A. Glass, Tahir Ghani 2017-09-05 $9,844,000
9735270 Semiconductor transistor having a stressed channel Robert S. Chau, Tahir Ghani, Kaizad Mistry 2017-08-15 $8,272,000
9728464 Self-aligned 3-D epitaxial structures for MOS device fabrication Glenn A. Glass, Daniel B. Aubertine, Gaurav Thareja, Tahir Ghani 2017-08-08 $11,912,000
9722023 Selective germanium P-contact metalization through trench Glenn A. Glass, Tahir Ghani 2017-08-01 $11,137,000
9705000 III-V layers for n-type and p-type MOS source-drain contacts Glenn A. Glass, Tahir Ghani 2017-07-11 $8,311,000
9680016 Method for improving transistor performance through reducing the salicide interface resistance Boyan Boyanov, Glenn A. Glass, Thomas Hoffmann 2017-06-13 $8,497,000
9660078 Enhanced dislocation stress transistor Cory E. Weber, Mark Liu, Hemant Deshpande, Daniel B. Aubertine 2017-05-23 $7,972,000
9653584 Pre-sculpting of Si fin elements prior to cladding for transistor channel applications Glenn A. Glass, Daniel B. Aubertine, Subhash M. Joshi 2017-05-16 $8,597,000
9640634 Field effect transistor structure with abrupt source/drain junctions Robert S. Chau, Patrick Morrow, Chia-Hong Jan, Paul Packan 2017-05-02 $12,076,000
9633835 Transistor fabrication technique including sacrificial protective layer for source/drain at contact location Glenn A. Glass, Michael Jackson, Michael L. Hattendorf, Subhash M. Joshi 2017-04-25 $8,972,000
9627384 Transistors with high concentration of boron doped germanium Glenn A. Glass, Tahir Ghani, Ravi Pillarisetty, Niloy Mukherjee, Jack T. Kavalieros +3 more 2017-04-18 $8,310,000
9614060 Nanowire transistor with underlayer etch stops Seiyon Kim, Daniel B. Aubertine, Kelin J. Kuhn 2017-04-04 $8,141,000
9583491 CMOS nanowire structure Seiyon Kim, Kelin J. Kuhn, Tahir Ghani, Annalisa Cappellani, Stephen M. Cea +2 more 2017-02-28 $9,011,000