Patent Leaderboard
USPTO Patent Rankings Data through Sept 30, 2025
ML

Mark Liu

Intel: 2 patents #1,256 of 5,604Top 25%
San Francisco, CA: #1,119 of 5,107 inventorsTop 25%
California: #13,043 of 60,394 inventorsTop 25%
Overall (2017): #126,687 of 506,227Top 30%
2 Patents 2017

Issued Patents 2017

Showing 1–2 of 2 patents

Patent #TitleCo-InventorsDate
9660078 Enhanced dislocation stress transistor Cory E. Weber, Anand S. Murthy, Hemant Deshpande, Daniel B. Aubertine 2017-05-23
9627384 Transistors with high concentration of boron doped germanium Anand S. Murthy, Glenn A. Glass, Tahir Ghani, Ravi Pillarisetty, Niloy Mukherjee +3 more 2017-04-18