| 9837276 |
Gate cut with high selectivity to preserve interlevel dielectric layer |
Ryan O. Jung, Ruilong Xie |
2017-12-05 |
| 9773885 |
Self aligned gate shape preventing void formation |
Qing Liu, Ruilong Xie, Chun-Chen Yeh |
2017-09-26 |
| 9741823 |
Fin cut during replacement gate formation |
Balasubramanian Pranatharthiharan, Sivananda K. Kanakasabapathy, John R. Sporre |
2017-08-22 |
| 9721848 |
Cutting fins and gates in CMOS devices |
Huiming Bu, Kangguo Cheng, Dechao Guo, Sivananda K. Kanakasabapathy, Gauri Karve +6 more |
2017-08-01 |
| 9721834 |
HDP fill with reduced void formation and spacer damage |
Huiming Bu, Balasubramanian Pranatharthiharan, Ruilong Xie |
2017-08-01 |
| 9698101 |
Self-aligned local interconnect technology |
Injo Ok, Balasubramanian Pranatharthiharan, Charan V. V. S. Surisetty, Ruilong Xie |
2017-07-04 |
| 9659786 |
Gate cut with high selectivity to preserve interlevel dielectric layer |
Ryan O. Jung, Ruilong Xie |
2017-05-23 |
| 9640633 |
Self aligned gate shape preventing void formation |
Qing Liu, Ruilong Xie, Chun-Chen Yeh |
2017-05-02 |
| 9634110 |
POC process flow for conformal recess fill |
Sanjay C. Mehta, Balasubramanian Pranatharthiharan, Ruilong Xie |
2017-04-25 |
| 9601366 |
Trench formation for dielectric filled cut region |
Ryan O. Jung, Ruilong Xie, Peng Xu |
2017-03-21 |
| 9601335 |
Trench formation for dielectric filled cut region |
Ryan O. Jung, Ruilong Xie, Peng Xu |
2017-03-21 |
| 9576954 |
POC process flow for conformal recess fill |
Sanjay C. Mehta, Balasubramanian Pranatharthiharan, Ruilong Xie |
2017-02-21 |
| 9558995 |
HDP fill with reduced void formation and spacer damage |
Huiming Bu, Balasubramanian Pranatharthiharan, Ruilong Xie |
2017-01-31 |
