Issued Patents 2011
Showing 1–25 of 32 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8084302 | Semiconductor package having semiconductor die with internal vertical interconnect structure and method therefor | Byung Tai Do, Seng Guan Chow, Linda Pei Ee Chua, Rui Huang | 2011-12-27 |
| 8084849 | Integrated circuit package system with offset stacking | Seng Guan Chow, Linda Pei Ee Chua | 2011-12-27 |
| 8080885 | Integrated circuit packaging system with multi level contact and method of manufacture thereof | Seng Guan Chow, Rui Huang | 2011-12-20 |
| 8080882 | Semiconductor device and method of forming stepped-down RDL and recessed THV in peripheral region of the device | Byung Tai Do, Reza A. Pagaila, Linda Pei Ee Chua | 2011-12-20 |
| 8062929 | Semiconductor device and method of stacking same size semiconductor die electrically connected through conductive via formed around periphery of the die | Byung Tai Do, Seng Guan Chow | 2011-11-22 |
| 8049314 | Integrated circuit package system with insulator over circuitry | Byung Tai Do, Seng Guan Chow, Linda Pei Ee Chua, Rui Huang | 2011-11-01 |
| 8048776 | Semiconductor device and method of supporting a wafer during backgrinding and reflow of solder bumps | Byung Tai Do, Yaojian Lin, Rui Huang | 2011-11-01 |
| 8039311 | Leadless semiconductor chip carrier system | Rui Huang, Seng Guan Chow | 2011-10-18 |
| 8021923 | Semiconductor package having through-hole vias on saw streets formed with partial saw | Byung Tai Do, Linda Pei Ee Chua | 2011-09-20 |
| 8017521 | Semiconductor package having through-hole vias on saw streets formed with partial saw | Byung Tai Do, Linda Pei Ee Chua | 2011-09-13 |
| 8018041 | Integrated circuit package system with offset stacked die | Byung Tai Do | 2011-09-13 |
| 8017501 | Semiconductor package having through-hole vias on saw streets formed with partial saw | Byung Tai Do, Linda Pei Ee Chua | 2011-09-13 |
| 7993979 | Leadless package system having external contacts | Byung Tai Do, Linda Pei Ee Chua | 2011-08-09 |
| 7993941 | Semiconductor package and method of forming Z-direction conductive posts embedded in structurally protective encapsulant | Rui Huang, Il Kwon Shim, Seng Guan Chow | 2011-08-09 |
| 7989269 | Semiconductor package with penetrable encapsulant joining semiconductor die and method thereof | Byung Tai Do, Seng Guan Chow, Linda Pei Ee Chua, Rui Huang | 2011-08-02 |
| 7989270 | Semiconductor device and method of forming three-dimensional vertically oriented integrated capacitors | Rui Huang, Yaojian Lin, Seng Guan Chow | 2011-08-02 |
| 7985628 | Integrated circuit package system with interconnect lock | Seng Guan Chow, Linda Pei Ee Chua, Dioscoro A. Merilo | 2011-07-26 |
| 7986043 | Integrated circuit package on package system | Dioscoro A. Merilo, Seng Guan Chow, Antonio B. Dimaano, Jr., Tsz Yin Ho | 2011-07-26 |
| 7981702 | Integrated circuit package in package system | Tsz Yin Ho, Dioscoro A. Merilo, Seng Guan Chow, Antonio B. Dimaano, Jr. | 2011-07-19 |
| 7968996 | Integrated circuit package system with supported stacked die | Byung Tai Do | 2011-06-28 |
| 7960841 | Through-hole via on saw streets | Byung Tai Do | 2011-06-14 |
| 7948066 | Integrated circuit package system with lead locking structure | Byung Tai Do, Linda Pei Ee Chua | 2011-05-24 |
| 7939368 | Wafer level chip scale package system with a thermal dissipation structure | Seng Guan Chow, Byung Tai Do | 2011-05-10 |
| 7923846 | Integrated circuit package-in-package system with wire-in-film encapsulant | Byung Tai Do, Seng Guan Chow, Linda Pei Ee Chua, Rui Huang | 2011-04-12 |
| 7911070 | Integrated circuit packaging system having planar interconnect | Reza A. Pagaila, Byung Tai Do | 2011-03-22 |