Issued Patents 2005
Showing 1–13 of 13 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6962875 | Variable contact method and structure | — | 2005-11-08 |
| 6960744 | Electrically tunable on-chip resistor | James W. Adkisson | 2005-11-01 |
| 6960519 | Interconnect structure improvements | Timothy J. Dalton, John A. Fitzsimmons, Jeffrey P. Gambino, Lee M. Nicholson, Andrew H. Simon | 2005-11-01 |
| 6958540 | Dual damascene interconnect structures having different materials for line and via conductors | Jeffrey P. Gambino, Edward C. Cooney, III, William T. Motsiff, Michael Lane, Andrew H. Simon | 2005-10-25 |
| 6939791 | Contact capping local interconnect | Robert M. Geffken, David V. Horak | 2005-09-06 |
| 6924555 | Specially shaped contact via and integrated circuit therewith | John Cronin | 2005-08-02 |
| 6914320 | Bilayer HDP CVD/PE CVD cap in advanced BEOL interconnect structures and method thereof | Tze-Chiang Chen, Brett H. Engel, John A. Fitzsimmons, Terence L. Kane, Naftall E. Lustig +5 more | 2005-07-05 |
| 6888251 | Metal spacer in single and dual damascene processing | Edward C. Cooney, III, Robert M. Geffken | 2005-05-03 |
| 6887783 | Bilayer HDP CVD/PE CVD cap in advance BEOL interconnect structures and method thereof | Tze-Chiang Chen, Brett H. Engel, John A. Fitzsimmons, Terence L. Kane, Naftall E. Lustig +5 more | 2005-05-03 |
| 6862799 | Method for changing an electrical resistance of a resistor | Arne Ballantine, Cyril Cabral, Jr., Daniel C. Edelstein | 2005-03-08 |
| 6858889 | Polysilicon capacitor having large capacitance and low resistance | James W. Adkisson, John A. Bracchitta, Jed H. Rankin | 2005-02-22 |
| 6846741 | Sacrificial metal spacer damascene process | Edward C. Cooney, III, Robert M. Geffken | 2005-01-25 |
| 6838355 | Damascene interconnect structures including etchback for low-k dielectric materials | Edward C. Cooney, III, Jeffrey P. Gambino, Timothy J. Dalton, John A. Fitzsimmons, Lee M. Nicholson | 2005-01-04 |