Issued Patents 2004
Showing 1–10 of 10 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6836017 | Protection of low-k ILD during damascene processing with thin liner | Minh Van Ngo, Christy Mei-Chu Woo, John Sanchez, Suzette K. Pangrle | 2004-12-28 |
| 6808591 | Model based metal overetch control | Khoi A. Phan, Bharath Rangarajan, Christopher F. Lyons, Ramkumar Subramanian, Bhanwar Singh +1 more | 2004-10-26 |
| 6771356 | Scatterometry of grating structures to monitor wafer stress | Christopher F. Lyons, Bhanwar Singh, Khoi A. Phan, Bharath Rangarajan, Ramkumar Subramanian +1 more | 2004-08-03 |
| 6756306 | Low temperature dielectric deposition to improve copper electromigration performance | Darrell M. Erb | 2004-06-29 |
| 6723635 | Protection low-k ILD during damascene processing with thin liner | Minh Van Ngo, Christy Mei-Chu Woo, John Sanchez, Suzette K. Pangrle | 2004-04-20 |
| 6720264 | Prevention of precipitation defects on copper interconnects during CMP by use of solutions containing organic compounds with silica adsorption and copper corrosion inhibiting properties | Kashmir Sahota, Diana M. Schonauer, Johannes Groschopf, Gerd Marxsen | 2004-04-13 |
| 6702648 | Use of scatterometry/reflectometry to measure thin film delamination during CMP | Bhanwar Singh, Bharath Rangarajan, Ramkumar Subramanian | 2004-03-09 |
| 6699785 | Conductor abrasiveless chemical-mechanical polishing in integrated circuit interconnects | Kai Yang, Kashmir Sahota | 2004-03-02 |
| 6684172 | Sensor to predict void free films using various grating structures and characterize fill performance | Ramkumar Subramanian, Christopher F. Lyons, Khoi A. Phan, Bharath Rangarajan, Bhanwar Singh +1 more | 2004-01-27 |
| 6682978 | Integrated circuit having increased gate coupling capacitance | Stephen Keetai Park | 2004-01-27 |