Issued Patents 2003
Showing 1–9 of 9 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6670255 | Method of fabricating lateral diodes and bipolar transistors | James W. Adkisson, Peter B. Gray, Anthony K. Stamper | 2003-12-30 |
| 6590259 | Semiconductor device of an embedded DRAM on SOI substrate | James W. Adkisson, Ramachandra Divakaruni, Jack A. Mandelman | 2003-07-08 |
| 6548357 | Modified gate processing for optimized definition of array and logic devices on same chip | Mary E. Weybright, Gary B. Bronner, Richard A. Conti, Ramachandra Divakaruni, Peter D. Hoh +1 more | 2003-04-15 |
| 6538295 | Salicide device with borderless contact | Gary B. Bronner, Louis L. Hsu, Jack A. Mandelman, Carl Radens, William R. Tonti | 2003-03-25 |
| 6518670 | Electrically porous on-chip decoupling/shielding layer | Jack A. Mandelman, Ronald G. Filippi, Richard A. Wachnik | 2003-02-11 |
| 6518119 | Strap with intrinsically conductive barrier | Rajarao Jammy, Jack A. Mandelman, Carl Radens | 2003-02-11 |
| 6503798 | Low resistance strap for high density trench DRAMS | Ramachandra Divakaruni, Herbert L. Ho, Akira Sudo | 2003-01-07 |
| 6504210 | Fully encapsulated damascene gates for Gigabit DRAMs | Ramachandra Divakaruni, Jack A. Mandelman, Viraj Y. Sardesai, Mary E. Weybright | 2003-01-07 |
| 6504203 | Method of forming a metal-insulator-metal capacitor for dual damascene interconnect processing and the device so formed | Stephen E. Luce, Thomas L. McDevitt, Henry W. Trombley | 2003-01-07 |