Issued Patents 2003
Showing 1–7 of 7 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6670255 | Method of fabricating lateral diodes and bipolar transistors | Jeffrey P. Gambino, Peter B. Gray, Anthony K. Stamper | 2003-12-30 |
| 6660596 | Double planar gated SOI MOSFET structure | John A. Bracchitta, John J. Ellis-Monaghan, Jerome B. Lasky, Effendi Leobandung, Kirk D. Peterson +1 more | 2003-12-09 |
| 6660664 | Structure and method for formation of a blocked silicide resistor | Arne Ballantine, Matthew D. Gallagher, Peter J. Geiss, Jeffrey D. Gilbert, Shwu-Jen Jeng +6 more | 2003-12-09 |
| 6653710 | Fuse structure with thermal and crack-stop protection | Edward P. Maciejewski, Peter Smeys, Anthony K. Stamper | 2003-11-25 |
| 6590259 | Semiconductor device of an embedded DRAM on SOI substrate | Ramachandra Divakaruni, Jeffrey P. Gambino, Jack A. Mandelman | 2003-07-08 |
| 6563131 | Method and structure of a dual/wrap-around gate field effect transistor | Paul D. Agnello, Arne Ballantine, Christopher S. Putnam, Jed H. Rankin | 2003-05-13 |
| 6555859 | Flip FERAM cell and method to form same | Charles T. Black, Alfred Grill, Randy W. Mann, Deborah A. Neumayer, Wilbur D. Pricer +2 more | 2003-04-29 |