Issued Patents 2003
Showing 1–5 of 5 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6660596 | Double planar gated SOI MOSFET structure | James W. Adkisson, John A. Bracchitta, John J. Ellis-Monaghan, Jerome B. Lasky, Kirk D. Peterson +1 more | 2003-12-09 |
| 6653698 | Integration of dual workfunction metal gate CMOS devices | Byoung Hun Lee, Ghavam G. Shahidi | 2003-11-25 |
| 6649460 | Fabricating a substantially self-aligned MOSFET | — | 2003-11-18 |
| 6635517 | Use of disposable spacer to introduce gettering in SOI layer | Tze-Chiang Chen, Thomas T. Hwang, Mukesh V. Khare, Anda C. Mocuta, Paul A. Ronsheim +1 more | 2003-10-21 |
| 6521947 | Method of integrating substrate contact on SOI wafers with STI process | Atul Ajmera, Werner Rausch, Dominic J. Schepis, Ghavam G. Shahidi | 2003-02-18 |