Issued Patents 2003
Showing 1–8 of 8 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6645795 | Polysilicon doped transistor using silicon-on-insulator and double silicon-on-insulator | K. Paul Muller, Ghavam G. Shahidi | 2003-11-11 |
| 6602759 | Shallow trench isolation for thin silicon/silicon-on-insulator substrates by utilizing polysilicon | Atul Ajmera, Klaus D. Beyer | 2003-08-05 |
| 6599813 | Method of forming shallow trench isolation for thin silicon-on-insulator substrates | Klaus D. Beyer | 2003-07-29 |
| 6563173 | Silicon-on-insulator chip having an isolation barrier for reliability | Ronald J. Bolam, Subhash B. Kulkarni | 2003-05-13 |
| 6541317 | Polysilicon doped transistor | K. Paul Muller, Ghavam G. Shahidi | 2003-04-01 |
| 6531375 | Method of forming a body contact using BOX modification | Kenneth J. Giewont, Eric Adler, Neena Garg, Michael Hargrove, Charles W. Koburger, III +2 more | 2003-03-11 |
| 6521947 | Method of integrating substrate contact on SOI wafers with STI process | Atul Ajmera, Effendi Leobandung, Werner Rausch, Ghavam G. Shahidi | 2003-02-18 |
| 6506649 | Method for forming notch gate having self-aligned raised source/drain structure | Ka-Hing Fung, Atul Ajmera, Victor Ku | 2003-01-14 |