Issued Patents 2003
Showing 1–4 of 4 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6670667 | Asymmetric gates for high density DRAM | Ramachandra Divakaruni, Wayne F. Ellis, Jack A. Mandelman | 2003-12-30 |
| 6656798 | Gate processing method with reduced gate oxide corner and edge thinning | Helmut Tews, Oleg Gluschenkov | 2003-12-02 |
| 6548357 | Modified gate processing for optimized definition of array and logic devices on same chip | Gary B. Bronner, Richard A. Conti, Ramachandra Divakaruni, Jeffrey P. Gambino, Peter D. Hoh +1 more | 2003-04-15 |
| 6504210 | Fully encapsulated damascene gates for Gigabit DRAMs | Ramachandra Divakaruni, Jeffrey P. Gambino, Jack A. Mandelman, Viraj Y. Sardesai | 2003-01-07 |