Issued Patents All Time
Showing 26–50 of 52 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11640990 | Power semiconductor devices including a trenched gate and methods of forming such devices | Sei-Hyung Ryu, Naeem Islam, Woongsun Kim, Matt N. McCain, Joe W. McPherson | 2023-05-02 |
| 11610991 | Gate trench power semiconductor devices having improved deep shield connection patterns | Naeem Islam, Woongsun Kim, Sei-Hyung Ryu | 2023-03-21 |
| 11563080 | Trenched power device with segmented trench and shielding | — | 2023-01-24 |
| 11563101 | Power semiconductor devices having multilayer gate dielectric layers that include an etch stop/field control layer and methods of forming such devices | — | 2023-01-24 |
| 11489069 | Vertical semiconductor device with improved ruggedness | Sei-Hyung Ryu, Kijeong Han, Edward Robert Van Brunt | 2022-11-01 |
| 11417760 | Vertical semiconductor device with improved ruggedness | Edward Robert Van Brunt | 2022-08-16 |
| 11355630 | Trench bottom shielding methods and approaches for trenched semiconductor device structures | Woongsun Kim, Naeem Islam, Sei-Hyung Ryu | 2022-06-07 |
| 11276762 | Interface layer control methods for semiconductor power devices and semiconductor devices formed thereof | — | 2022-03-15 |
| 11222955 | Semiconductor power devices having gate dielectric layers with improved breakdown characteristics and methods of forming such devices | Brett Hull, Edward Robert Van Brunt, Shadi Sabri, Matt N. McCain | 2022-01-11 |
| 11175333 | System and process for implementing accelerated test conditions for high voltage lifetime evaluation of semiconductor power devices | Satyaki Ganguly | 2021-11-16 |
| 11164813 | Transistor semiconductor die with increased active area | Edward Robert Van Brunt | 2021-11-02 |
| 11075264 | Super junction power semiconductor devices formed via ion implantation channeling techniques and related methods | Edward Robert Van Brunt, Alexander V. Suvorov, Vipindas Pala, Qingchun Zhang | 2021-07-27 |
| 10998418 | Power semiconductor devices having reflowed inter-metal dielectric layers | Edward Robert Van Brunt, Shadi Sabri | 2021-05-04 |
| 10910481 | Semiconductor device with improved insulated gate | Lin Cheng, John Williams Palmour | 2021-02-02 |
| RE48380 | Vertical power transistor device | Vipindas Pala, Anant Agarwal, Lin Cheng, John Williams Palmour | 2021-01-05 |
| 10861931 | Power semiconductor devices having gate trenches and buried edge terminations and related methods | Edward Robert Van Brunt, Brett Hull | 2020-12-08 |
| 10847647 | Power semiconductor devices having top-side metallization structures that include buried grain stop layers | Shadi Sabri, Edward Robert Van Brunt, Scott Allen, Brett Hull | 2020-11-24 |
| 10615274 | Vertical semiconductor device with improved ruggedness | Edward Robert Van Brunt | 2020-04-07 |
| 9972677 | Methods of forming power semiconductor devices having superjunction structures with pillars having implanted sidewalls | Edward Robert Van Brunt, Vipindas Pala, Lin Cheng | 2018-05-15 |
| 9887287 | Power semiconductor devices having gate trenches with implanted sidewalls and related methods | Edward Robert Van Brunt, Brett Hull, Alexander V. Suvorov, Craig Capell | 2018-02-06 |
| 9741842 | Vertical power transistor device | Vipindas Pala, Anant Agarwal, Lin Cheng, John Williams Palmour | 2017-08-22 |
| 9570570 | Enhanced gate dielectric for a field effect device with a trenched gate | Lin Cheng, Anant Agarwal, John Williams Palmour | 2017-02-14 |
| 9515199 | Power semiconductor devices having superjunction structures with implanted sidewalls | Edward Robert Van Brunt, Vipindas Pala, Lin Cheng | 2016-12-06 |
| 9396946 | Wet chemistry processes for fabricating a semiconductor device with increased channel mobility | Sarit Dhar, Lin Cheng, Sei-Hyung Ryu, Anant Agarwal, John Williams Palmour +2 more | 2016-07-19 |
| 9331197 | Vertical power transistor device | Vipindas Pala, Anant Agarwal, Lin Cheng, John Williams Palmour | 2016-05-03 |