MS

Mark F. Sylvester

WG W.L. Gore & Associates Gmbh: 15 patents #46 of 1,175Top 4%
GH Gore Enterprise Holdings: 3 patents #57 of 386Top 15%
3M: 1 patents #7,233 of 11,543Top 65%
RO Rogers: 1 patents #106 of 245Top 45%
📍 Central Falls, RI: #4 of 197 inventorsTop 3%
🗺 Rhode Island: #199 of 6,211 inventorsTop 4%
Overall (All Time): #186,222 of 4,157,543Top 5%
23
Patents All Time

Issued Patents All Time

Showing 1–23 of 23 patents

Patent #TitleCo-InventorsDate
7593933 Method and apparatus for a collaborative interaction network Kymberlee Weil, Beau Ambur 2009-09-22
6847527 Interconnect module with reduced power distribution impedance David A. Hanson, William George Petefish 2005-01-25
6344371 Dimensionally stable core for use in high density chip packages and a method of fabricating same Paul J. Fischer, Robin E. Gorrell 2002-02-05
6248959 Substrate with die area having same CTE as IC 2001-06-19
6183592 Method for minimizing warp in the production of electronic assemblies 2001-02-06
6184589 Constraining ring for use in electronic packaging John J. Budnaitis, Paul J. Fischer, David A. Hanson, David B. Noddin, William George Petefish 2001-02-06
6127250 Method of increasing package reliability by designing in plane CTE gradients David B. Noddin 2000-10-03
6027590 Method for minimizing warp and die stress in the production of an electronic assembly William George Petefish, Paul J. Fischer 2000-02-22
6015722 Method for assembling an integrated circuit chip package having an underfill material between a chip and a substrate Donald R. Banks, Ronald G. Pofahl, William George Petefish, Paul J. Fischer 2000-01-18
6014317 Chip package mounting structure for controlling warp of electronic assemblies due to thermal expansion effects 2000-01-11
6011697 Constraining ring for use in electronic packaging John J. Budnaitis, Paul J. Fischer, David A. Hanson, David B. Noddin, William George Petefish 2000-01-04
5983974 Method of making a lid for a chip/package system 1999-11-16
5970319 Method for assembling an integrated circuit chip package having at least one semiconductor device Donald R. Banks, Ronald G. Pofahl, William George Petefish, Paul J. Fischer 1999-10-19
5919329 Method for assembling an integrated circuit chip package having at least one semiconductor device Donald R. Banks, Ronald G. Pofahl, William George Petefish, Paul J. Fischer 1999-07-06
5900312 Integrated circuit chip package assembly 1999-05-04
5888630 Apparatus and method for unit area composition control to minimize warp in an integrated circuit chip package assembly David B. Noddin 1999-03-30
5888631 Method for minimizing warp in the production of electronic assemblies 1999-03-30
5879786 Constraining ring for use in electronic packaging John J. Budnaitis, Paul J. Fischer, David A. Hanson, David B. Noddin, William George Petefish 1999-03-09
5868887 Method for minimizing warp and die stress in the production of an electronic assembly William George Petefish, Paul J. Fischer 1999-02-09
5847327 Dimensionally stable core for use in high density chip packages Paul J. Fischer, Robin E. Gorrell 1998-12-08
5838063 Method of increasing package reliability using package lids with plane CTE gradients 1998-11-17
5778523 Method for controlling warp of electronic assemblies by use of package stiffener 1998-07-14
5287619 Method of manufacture multichip module substrate W. David Smith, John Albert Olenick, Carlos L. Barton, Jane L. Cercena, Daniel J. Navarro +12 more 1994-02-22