Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 6847527 | Interconnect module with reduced power distribution impedance | Mark F. Sylvester, David A. Hanson | 2005-01-25 |
| 6184589 | Constraining ring for use in electronic packaging | John J. Budnaitis, Paul J. Fischer, David A. Hanson, David B. Noddin, Mark F. Sylvester | 2001-02-06 |
| 6027590 | Method for minimizing warp and die stress in the production of an electronic assembly | Mark F. Sylvester, Paul J. Fischer | 2000-02-22 |
| 6015722 | Method for assembling an integrated circuit chip package having an underfill material between a chip and a substrate | Donald R. Banks, Ronald G. Pofahl, Mark F. Sylvester, Paul J. Fischer | 2000-01-18 |
| 6011697 | Constraining ring for use in electronic packaging | John J. Budnaitis, Paul J. Fischer, David A. Hanson, David B. Noddin, Mark F. Sylvester | 2000-01-04 |
| 5970319 | Method for assembling an integrated circuit chip package having at least one semiconductor device | Donald R. Banks, Ronald G. Pofahl, Mark F. Sylvester, Paul J. Fischer | 1999-10-19 |
| 5919329 | Method for assembling an integrated circuit chip package having at least one semiconductor device | Donald R. Banks, Ronald G. Pofahl, Mark F. Sylvester, Paul J. Fischer | 1999-07-06 |
| 5882459 | Method for aligning and laminating substrates to stiffeners in electrical circuits | Boydd Piper | 1999-03-16 |
| 5879787 | Method and apparatus for improving wireability in chip modules | — | 1999-03-09 |
| 5879786 | Constraining ring for use in electronic packaging | John J. Budnaitis, Paul J. Fischer, David A. Hanson, David B. Noddin, Mark F. Sylvester | 1999-03-09 |
| 5868887 | Method for minimizing warp and die stress in the production of an electronic assembly | Mark F. Sylvester, Paul J. Fischer | 1999-02-09 |
| 5853517 | Method for coining solder balls on an electrical circuit package | Boydd Piper, Thomas Walker | 1998-12-29 |
| 5701032 | Integrated circuit package | Paul J. Fischer | 1997-12-23 |
| 5525834 | Integrated circuit package | Paul J. Fischer | 1996-06-11 |
| 5276955 | Multilayer interconnect system for an area array interconnection using solid state diffusion | David B. Noddin, Robin E. Gorrell, Kevin L. Stumpe, Boydd Piper, Deepak Swamy +2 more | 1994-01-11 |