Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12257368 | Epithelializing microporous biomaterial for use in avascular environments and in corneal implants | Gopalan V. Balaji, Thomas B. Schmiedel, Anuraag Singh | 2025-03-25 |
| 6544638 | Electronic chip package | Joseph E. Korleski | 2003-04-08 |
| 6344371 | Dimensionally stable core for use in high density chip packages and a method of fabricating same | Robin E. Gorrell, Mark F. Sylvester | 2002-02-05 |
| 6184589 | Constraining ring for use in electronic packaging | John J. Budnaitis, David A. Hanson, David B. Noddin, Mark F. Sylvester, William George Petefish | 2001-02-06 |
| 6143401 | Electronic chip package | Joseph E. Korleski | 2000-11-07 |
| 6027590 | Method for minimizing warp and die stress in the production of an electronic assembly | Mark F. Sylvester, William George Petefish | 2000-02-22 |
| 6015722 | Method for assembling an integrated circuit chip package having an underfill material between a chip and a substrate | Donald R. Banks, Ronald G. Pofahl, Mark F. Sylvester, William George Petefish | 2000-01-18 |
| 6011697 | Constraining ring for use in electronic packaging | John J. Budnaitis, David A. Hanson, David B. Noddin, Mark F. Sylvester, William George Petefish | 2000-01-04 |
| 5976974 | Method of forming redundant signal traces and corresponding electronic components | Robin E. Gorrell | 1999-11-02 |
| 5970319 | Method for assembling an integrated circuit chip package having at least one semiconductor device | Donald R. Banks, Ronald G. Pofahl, Mark F. Sylvester, William George Petefish | 1999-10-19 |
| 5919329 | Method for assembling an integrated circuit chip package having at least one semiconductor device | Donald R. Banks, Ronald G. Pofahl, Mark F. Sylvester, William George Petefish | 1999-07-06 |
| 5879786 | Constraining ring for use in electronic packaging | John J. Budnaitis, David A. Hanson, David B. Noddin, Mark F. Sylvester, William George Petefish | 1999-03-09 |
| 5868887 | Method for minimizing warp and die stress in the production of an electronic assembly | Mark F. Sylvester, William George Petefish | 1999-02-09 |
| 5847327 | Dimensionally stable core for use in high density chip packages | Robin E. Gorrell, Mark F. Sylvester | 1998-12-08 |
| 5786270 | Method of forming raised metallic contacts on electrical circuits for permanent bonding | Robin E. Gorrell | 1998-07-28 |
| 5747358 | Method of forming raised metallic contacts on electrical circuits | Robin E. Gorrell | 1998-05-05 |
| 5701032 | Integrated circuit package | William George Petefish | 1997-12-23 |
| 5525834 | Integrated circuit package | William George Petefish | 1996-06-11 |
| 5473119 | Stress-resistant circuit board | C. Thomas Rosenmayer | 1995-12-05 |
| 5034801 | Intergrated circuit element having a planar, solvent-free dielectric layer | — | 1991-07-23 |
| 4996097 | High capacitance laminates | — | 1991-02-26 |