MY

Ming-Tzong Yang

UM United Microelectronics: 63 patents #38 of 4,560Top 1%
ME Mediatek: 36 patents #35 of 2,888Top 2%
NU National Taiwan University: 1 patents #729 of 2,195Top 35%
UI United Silicon Incorporated: 1 patents #20 of 57Top 40%
UN Unknown: 1 patents #29,356 of 83,584Top 40%
Overall (All Time): #14,329 of 4,157,543Top 1%
100
Patents All Time

Issued Patents All Time

Showing 26–50 of 100 patents

Patent #TitleCo-InventorsDate
8987851 Radio-frequency device package and method for fabricating the same Cheng-Chou Hung, Tung-Hsing Lee, Wei-Che Huang, Yu-Hua Huang 2015-03-24
8921941 ESD protection device and method for fabricating the same Ming-Cheng Lee 2014-12-30
8860544 Integrated inductor Ching-Chung Ko, Tung-Hsing Lee, Kuei-Ti Chan, Tao Cheng 2014-10-14
8810001 Seal ring structure with capacitor Cheng-Chou Hung, Tung-Hsing Lee, Yu-Hua Huang 2014-08-19
8779591 Bump pad structure Yu-Hua Huang 2014-07-15
8669619 Semiconductor structure with multi-layer contact etch stop layer structure Tien-Chang Chang, Jing Chen 2014-03-11
8587056 High-voltage metal-oxide-semiconductor device Ming-Cheng Lee, Tao Cheng 2013-11-19
8278733 Bonding pad structure and integrated circuit chip using such bonding pad structure Yu-Hua Huang 2012-10-02
7932581 Lateral bipolar junction transistor Ching-Chung Ko, Tung-Hsing Lee, Zheng Zeng 2011-04-26
7897995 Lateral bipolar junction transistor with reduced base resistance Tao Cheng, Ching-Chung Ko, Tung-Hsing Lee 2011-03-01
7671469 SiGe device with SiGe-embedded dummy pattern for alleviating micro-loading effect Tung-Hsing Lee, Tao Cheng, Ching-Chung Ko, Tien-Chang Chang, Yu-Tung Chang 2010-03-02
7169668 Method of manufacturing a split-gate flash memory device Tzu-Ping Chen 2007-01-30
6258692 Method forming shallow trench isolation Chih-Hsun Chu, Hong-Tsz Pan 2001-07-10
6232215 Method for forming increased density for interconnection metallization 2001-05-15
6221731 Process of fabricating buried diffusion junction Nai-Chen Peng 2001-04-24
6020251 Method of forming buried diffusion junctions in conjunction with shallow-trench isolation structures in a semiconductor device Nai-Chen Peng 2000-02-01
5981404 Multilayer ONO structure Yi-Chung Sheng, Yi Chih Lim, Ming-Hua Liu 1999-11-09
5902752 Active layer mask with dummy pattern Shin-Wei Sun, Water Lur, Hong-Tsz Pan 1999-05-11
5895945 Single polysilicon neuron MOSFET Hong-Tsz Pan, Chung-Cheng Wu 1999-04-20
5798298 Method of automatically generating dummy metals for multilevel interconnection Hong-Tsz Pan 1998-08-25
5757083 Drain off-set for pull down transistor for low leakage SRAM's 1998-05-26
5716884 Process for fabricating a stacked capacitor Chen-Chiu Hsue, Gary Hong 1998-02-10
5712500 Multiple cell with common bit line contact and method of manufacture thereof Chen-Chiu Hsue 1998-01-27
5698458 Multiple well device and process of manufacture Chen-Chiu Hsue, Sun-Chieh Chien, Chung-Yuan Lee 1997-12-16
5698349 Sub-resolution phase shift mask 1997-12-16