Issued Patents All Time
Showing 1–15 of 15 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11854924 | Semiconductor package with improved reliability | Yan-Liang Ji | 2023-12-26 |
| 9847294 | Semiconductor device allowing metal layer routing formed directly under metal pad | Chun-Liang Chen, Chien-Chih Lin | 2017-12-19 |
| 9627336 | Semiconductor device allowing metal layer routing formed directly under metal pad | Chun-Liang Chen, Chien-Chih Lin | 2017-04-18 |
| 9455226 | Semiconductor device allowing metal layer routing formed directly under metal pad | Chun-Liang Chen, Chien-Chih Lin | 2016-09-27 |
| 8766417 | Integrated circuit chip with reduced IR drop | Chao-Chun Tu, Shih-Hung Lin, Chih-Chien Huang | 2014-07-01 |
| 8669619 | Semiconductor structure with multi-layer contact etch stop layer structure | Jing Chen, Ming-Tzong Yang | 2014-03-11 |
| 8587090 | Die seal ring structure | Yu-Hua Huang | 2013-11-19 |
| 8476745 | Integrated circuit chip with reduced IR drop | Chao-Chun Tu, Shih-Hung Lin, Chih-Chien Huang | 2013-07-02 |
| 8242586 | Integrated circuit chip with seal ring structure | Shi-Bai Chen, Tao Cheng, Yu-Hua Huang | 2012-08-14 |
| 8212323 | Seal ring structure for integrated circuits | Tung-Hsing Lee, Yuan-Hung Chung | 2012-07-03 |
| 8188578 | Seal ring structure for integrated circuits | Tung-Hsing Lee, Yuan-Hung Chung | 2012-05-29 |
| 8138616 | Bond pad structure | Tao Cheng, Chien-Hui Chuang, Bo-Shih Huang | 2012-03-20 |
| 7671469 | SiGe device with SiGe-embedded dummy pattern for alleviating micro-loading effect | Tung-Hsing Lee, Ming-Tzong Yang, Tao Cheng, Ching-Chung Ko, Yu-Tung Chang | 2010-03-02 |
| 7667302 | Integrated circuit chip with seal ring structure | Shi-Bai Chen, Tao Cheng | 2010-02-23 |
| 5434096 | Method to prevent silicide bubble in the VLSI process | Cheng-Te Chu, Yung-Haw Liaw, Hsin-Chieh Huang | 1995-07-18 |