Issued Patents All Time
Showing 1–23 of 23 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| D1084545 | Cat toy | — | 2025-07-15 |
| 12107059 | Semiconductor package and manufacturing method thereof | — | 2024-10-01 |
| 11935852 | Semiconductor package and manufacturing method thereof | — | 2024-03-19 |
| 11854924 | Semiconductor package with improved reliability | Tien-Chang Chang | 2023-12-26 |
| 11705514 | MOS transistor structure with hump-free effect | Cheng-Hua LIN | 2023-07-18 |
| 10998267 | Wafer-level chip-size package with redistribution layer | Ming-Jen Hsiung | 2021-05-04 |
| 10879389 | Semiconductor device capable of high-voltage operation | Cheng-Hua LIN, Chih-Wen Hsiung | 2020-12-29 |
| 10587021 | All solid state lithium battery | Chao Wang, Tianren Xu | 2020-03-10 |
| 10541328 | Semiconductor device capable of high-voltage operation | Cheng-Hua LIN, Chih-Wen Hsiung | 2020-01-21 |
| 10396166 | Semiconductor device capable of high-voltage operation | Cheng-Hua LIN | 2019-08-27 |
| 10373949 | Semiconductor device and manufacturing method thereof | Cheng-Hua LIN, Chih-Chung Chiu | 2019-08-06 |
| 10199496 | Semiconductor device capable of high-voltage operation | Cheng-Hua LIN, Chih-Wen Hsiung | 2019-02-05 |
| 10186887 | Systems and methods for fast charging batteries at low temperatures | Chao Wang | 2019-01-22 |
| 10177225 | Electronic component and manufacturing method thereof | Cheng-Hua LIN, Puo-Yu Chiang | 2019-01-08 |
| 10033071 | Ohmically modulated battery | Chao Wang, Shanhai GE, Tianren Xu | 2018-07-24 |
| 9953954 | Wafer-level chip-scale package with redistribution layer | Ming-Jen Hsiung | 2018-04-24 |
| 9825168 | Semiconductor device capable of high-voltage operation | Cheng-Hua LIN | 2017-11-21 |
| 9627723 | Operation of electrochemical energy systems | Chao Wang, Puneet K. Sinha, Shanhai GE | 2017-04-18 |
| 9029223 | MOS device with isolated drain and method for fabricating the same | Puo-Yu Chiang | 2015-05-12 |
| 9006825 | MOS device with isolated drain and method for fabricating the same | Puo-Yu Chiang | 2015-04-14 |
| 9006068 | MOS device with isolated drain and method for fabricating the same | Puo-Yu Chiang | 2015-04-14 |
| 8359555 | Arranging virtual patterns in semiconductor layout | — | 2013-01-22 |
| 7823118 | Computer readable medium having multiple instructions stored in a computer readable device | — | 2010-10-26 |