Issued Patents All Time
Showing 1–25 of 25 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8912769 | Current mode buck-boost converter | Ming-Wei Lin, Ching-Long Lin, Ke-Horng Chen, Yu-Huei Lee, Shih-Wei Wang +2 more | 2014-12-16 |
| 7402514 | Line-to-line reliability enhancement using a dielectric liner for a low dielectric constant interlevel and intralevel (or intermetal and intrametal) dielectric layer | Joe W. McPherson, William R. McKee, Thomas D. Bonifield | 2008-07-22 |
| 6951812 | Copper transition layer for improving copper interconnection reliability | Qing Jiang, Kenneth D. Brennan | 2005-10-04 |
| 6696337 | Method of manufacturing a semiconductor integrated circuit device having a memory cell array and a peripheral circuit region | Isamu Asano | 2004-02-24 |
| 6693356 | Copper transition layer for improving copper interconnection reliability | Qing Jiang, Kenneth D. Brennan | 2004-02-17 |
| 6653676 | Integrated circuit capacitor | Isamu Asano, Shinpei Iijima, William R. McKee | 2003-11-25 |
| 6528888 | Integrated circuit and method | Chih-Chen Cho, Jeffrey McKee, William R. McKee, Isamu Asano | 2003-03-04 |
| 6461955 | Yield improvement of dual damascene fabrication through oxide filling | Qi-Zhong Hong, William R. McKee | 2002-10-08 |
| 6417045 | Method of manufacturing a semiconductor integrated circuit device including a DRAM having reduced parasitic bit line capacity | Isamu Asano | 2002-07-09 |
| 6331325 | Barium strontium titanate (BST) thin films using boron | Bernard M. Kulwicki | 2001-12-18 |
| 6294420 | Integrated circuit capacitor | Isamu Asano, Shinpei Iijima, William R. McKee | 2001-09-25 |
| 6207561 | Selective oxidation methods for metal oxide deposition on metals in capacitor fabrication | Ming-Jang Hwang, Wei-Yung Hsu | 2001-03-27 |
| 6194292 | Method of fabricating in-situ doped rough polycrystalline silicon using a single wafer reactor | Shintaro Aoyama, Toshio Ando | 2001-02-27 |
| 6168985 | Semiconductor integrated circuit device including a DRAM having reduced parasitic bit line capacity and method of manufacturing same | Isamu Asano | 2001-01-02 |
| 6096597 | Method for fabricating an integrated circuit structure | William R. McKee, Shimpei Iijima, Isamu Asano, Masato Kunitomo, Tsuyoshi Tamaru | 2000-08-01 |
| 6060354 | In-situ doped rough polysilicon storage cell structure formed using gas phase nucleation | William R. McKee, Ming-Jang Hwang | 2000-05-09 |
| 6037207 | Method of manufacturing semiconductor integrated circuit device including a DRAM having reduced parasitic bit line capacity | Isamu Asano | 2000-03-14 |
| 5972769 | Self-aligned multiple crown storage capacitor and method of formation | Jing Shu, Isamu Asano, Jeffrey McKee | 1999-10-26 |
| 5731220 | Method of making barium strontium titanate (BST) thin film by erbium donor doping | Bernard M. Kulwicki | 1998-03-24 |
| 5635741 | Barium strontium titanate (BST) thin films by erbium donor doping | Bernard M. Kulwicki | 1997-06-03 |
| 5617290 | Barium strontium titanate (BST) thin films using boron | Bernard M. Kulwicki | 1997-04-01 |
| 5609927 | Processing methods for high-dielectric-constant materials | Scott R. Summerfelt, Howard R. Beratan | 1997-03-11 |
| 5573979 | Sloped storage node for a 3-D dram cell structure | Wei-Yung Hsu | 1996-11-12 |
| 5453908 | Barium strontium titanate (BST) thin films by holmium donor doping | Bernard M. Kulwicki | 1995-09-26 |
| 5432128 | Reliability enhancement of aluminum interconnects by reacting aluminum leads with a strengthening gas | — | 1995-07-11 |