JS

John W. Smith

TE Tessera: 127 patents #4 of 271Top 2%
MC Mexichem Amanco Holdings S.A. De C.V.: 10 patents #4 of 18Top 25%
SD Steelcase Development: 7 patents #67 of 472Top 15%
IC ICI: 5 patents #277 of 2,189Top 15%
LC Lifesize Communications: 4 patents #17 of 46Top 40%
BL Brooks England Limited: 2 patents #2 of 12Top 20%
DS Dallas Semiconductor: 1 patents #78 of 116Top 70%
CR Conagra Foods Rdm: 1 patents #91 of 185Top 50%
BC Buckeye Cellulose: 1 patents #4 of 24Top 20%
📍 San Francisco, CA: #67 of 26,999 inventorsTop 1%
🗺 California: #886 of 386,348 inventorsTop 1%
Overall (All Time): #5,483 of 4,157,543Top 1%
159
Patents All Time

Issued Patents All Time

Showing 51–75 of 159 patents

Patent #TitleCo-InventorsDate
6635553 Microelectronic assemblies with multiple leads Thomas H. DiStefano 2003-10-21
6627478 Method of making a microelectronic assembly with multiple lead deformation using differential thermal expansion/contraction Christopher M. Pickett 2003-09-30
6603209 Compliant integrated circuit package Thomas H. DiStefano, Konstantine Karavakis, Craig Mitchell 2003-08-05
6589819 Microelectronic packages having an array of resilient leads and methods therefor Bruce M. McWilliams 2003-07-08
6586955 Methods and structures for electronic probing arrays Joseph Fjelstad 2003-07-01
6570101 Lead configurations Thomas Di Stefano 2003-05-27
D473517 Partition insert Thomas Overthun, James N. Ludwig, David M. Gresham, Karl-Heinz Mueller, Monika Conway +1 more 2003-04-22
6541852 Framed sheets Masud Beroz, Thomas H. DiStefano 2003-04-01
6525429 Methods of making microelectronic assemblies including compliant interfaces Zlata Kovac, Craig Mitchell, Thomas H. DiStefano 2003-02-25
6518662 Method of assembling a semiconductor chip package Joseph Fjelstad 2003-02-11
6489674 Method for creating a die shrink insensitive semiconductor package and component therefor Belgacem Haba 2002-12-03
6486547 Microelectronic assembly incorporating lead regions defined by gaps in a polymeric sheet Joseph Fjelstad 2002-11-26
6468836 Laterally situated stress/strain relieving lead for a semiconductor chip package Thomas H. DiStefano, Joseph Fjelstad 2002-10-22
6441488 Fan-out translator for a semiconductor package 2002-08-27
6437240 Microelectronic connections with liquid conductive elements 2002-08-20
6429112 Multi-layer substrates and fabrication processes Belgacem Haba 2002-08-06
6420661 Connector element for connecting microelectronic elements Thomas H. Di Stefano 2002-07-16
6373141 Bondable compliant pads for packaging of a semiconductor chip and method therefor Thomas H. DiStefano, Zlata Kovac 2002-04-16
6370032 Compliant microelectronic mounting device Thomas H. DiStefano, Zlata Kovac, Konstantine Karavakis 2002-04-09
6365436 Connecting multiple microelectronic elements with lead deformation Tony Faraci, Thomas H. DiStefano 2002-04-02
6365975 Chip with internal signal routing in external element Thomas H. DiStefano 2002-04-02
6361959 Microelectronic unit forming methods and materials Masud Beroz, Joseph Fjelstad, Belgacem Haba, Christopher M. Pickett 2002-03-26
6358780 Semiconductor package assemblies with moisture vents and methods of making same Christopher M. Pickett 2002-03-19
6357112 Method of making connection component Thomas H. DiStefano, Joseph Fjelstad, Belgacem Haba, Owais Jamil, Konstantine Karavakis +1 more 2002-03-19
6359335 Method of manufacturing a plurality of semiconductor packages and the resulting semiconductor package structures Thomas H. DiStefano, Craig Mitchell 2002-03-19