Issued Patents All Time
Showing 26–50 of 60 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11387406 | Magnetic of forming magnetic tunnel junction device using protective mask | Hui-Hsien Wei, Han-Ting Lin, Sin-Yi Yang, Yu-Shu Chen, An-Shen Chang +2 more | 2022-07-12 |
| 11348829 | Patterning methods for semiconductor devices and structures resulting therefrom | Wen-Yen Chen, Chih-Hao Chen | 2022-05-31 |
| 11271150 | Integrated circuit | Chien-Chung Huang, Yu-Shu Chen, Sin-Yi Yang, Chen-Jung Wang, Han-Ting Lin +3 more | 2022-03-08 |
| 11217476 | Method of forming an interconnect structure of a semiconductor device | Jyu-Horng Shieh | 2022-01-04 |
| 11189658 | Magnetic random access memory and manufacturing method thereof | Hui-Hsien Wei, Chung-Te Lin, Han-Ting Tsai, Pin-Ren Dai, Chien-Min Lee +2 more | 2021-11-30 |
| 11183392 | Method for manufacturing semiconductor devices and structures thereof | Jiann-Horng Lin, Chao-Kuei Yeh, Ying Wu, Chih-Hao Chen, Chih-Sheng Tian | 2021-11-23 |
| 11101429 | Metal etching stop layer in magnetic tunnel junction memory cells | Sin-Yi Yang, Chen-Jung Wang, Yu-Shu Chen, Chien-Chung Huang, Han-Ting Lin +2 more | 2021-08-24 |
| 11063217 | Semiconductor device | Hui-Hsien Wei, Wei-Chih Wen, Pin-Ren Dai, Chien-Min Lee, Han-Ting Tsai +2 more | 2021-07-13 |
| 11037981 | Semiconductor device with magnetic tunnel junctions | Tsung-Hsien Chang, Yu-Shu Chen, Chih-Yuan Ting, Jyu-Horng Shieh, Chung-Te Lin | 2021-06-15 |
| 10971682 | Method for fabricating memory device | Hui-Hsien Wei, Wei-Chih Wen, Pin-Ren Dai, Chien-Min Lee, Sheng-Chih Lai +2 more | 2021-04-06 |
| 10964888 | Magnetic tunnel junctions | Pin-Ren Dai, Chung-Ju Lee, Chung-Te Lin, Chih Wei Lu, Hsi-Wen Tien +2 more | 2021-03-30 |
| 10879458 | Memory device | Hui-Hsien Wei, Wei-Chih Wen, Pin-Ren Dai, Chien-Min Lee, Sheng-Chih Lai +2 more | 2020-12-29 |
| 10868239 | Gradient protection layer in MTJ manufacturing | Yu-Shu Chen, Sin-Yi Yang, Chen-Jung Wang, Chien-Chung Huang, Han-Ting Lin +2 more | 2020-12-15 |
| 10867910 | Semiconductor device with damascene structure | — | 2020-12-15 |
| 10862023 | Semiconductor structure and manufacturing method of the same | Yu-Shu Chen, Chien-Chung Huang, Sin-Yi Yang, Chen-Jung Wang, Han-Ting Lin +2 more | 2020-12-08 |
| 10847418 | Formation method of damascene structure | Chia-Tien Wu, Jye-Yen Cheng | 2020-11-24 |
| 10840131 | Patterning methods for semiconductor devices and structures resulting therefrom | Wen-Yen Chen, Chih-Hao Chen | 2020-11-17 |
| 10770345 | Integrated circuit and fabrication method thereof | Chang-Sheng Lin, Chien-Chung Huang, Yu-Shu Chen, Sin-Yi Yang, Chen-Jung Wang +3 more | 2020-09-08 |
| 10734580 | Memory device and fabrication method thereof | Hui-Hsien Wei, Wei-Chih Wen, Pin-Ren Dai, Chien-Min Lee, Han-Ting Tsai +2 more | 2020-08-04 |
| 10672651 | Method for forming structure of dual damascene structures having via hole and trench | Jyu-Horng Shieh | 2020-06-02 |
| 10651373 | Memory device and fabrication method thereof | Chien-Chung Huang, Yu-Shu Chen, Sin-Yi Yang, Chen-Jung Wang, Han-Ting Lin +3 more | 2020-05-12 |
| 10644231 | Memory device and fabrication method thereof | Hui-Hsien Wei, Wei-Chih Wen, Pin-Ren Dai, Chien-Min Lee, Sheng-Chih Lai +2 more | 2020-05-05 |
| 10636667 | Method for manufacturing semiconductor devices and structures thereof | Jiann-Horng Lin, Chao-Kuei Yeh, Ying Wu, Chih-Hao Chen, Chih-Sheng Tian | 2020-04-28 |
| 10636963 | Magnetic tunnel junctions | Pin-Ren Dai, Chung-Ju Lee, Chung-Te Lin, Chih Wei Lu, Hsi-Wen Tien +2 more | 2020-04-28 |
| 10559492 | Patterning methods for semiconductor devices and structures resulting therefrom | Wen-Yen Chen, Chih-Hao Chen | 2020-02-11 |