Issued Patents All Time
Showing 26–50 of 83 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 11208793 | Sanitary equipment with water supply system, water route system and sink | Wen-Yi Chiu, Pin-Hsing Lee | 2021-12-28 |
| 11014111 | Sanitary equipment and control method thereof | Wei-Jun Wang, Ruei-Hong Hong, Wen-Yi Chiu, Chia-Shin Weng, Shi-Kuan Chen | 2021-05-25 |
| 10991819 | High electron mobility transistors | Chung-Yi Yu, Chi-Ming Chen, Chen-Hao Chiang | 2021-04-27 |
| D916716 | Water flow and water flow control device having display screen with transitional graphical user interface | Ruei-Hong Hong, Wen-Yi Chiu, Wei-Jun Wang | 2021-04-20 |
| 10937900 | Semiconductor structure and manufacturing method thereof | Chi-Ming Chen, Yao-Chung Chang, Jiun-Lei Jerry Yu, Chen-Hao Chiang, Chung-Yi Yu | 2021-03-02 |
| D908851 | Hand washing station | Pin-Hsing Lee, Wen-Yi Chiu | 2021-01-26 |
| 10896985 | Dielectric sidewall structure for quality improvement in GE and SIGE devices | Chih-Ming Chen, Lee-Chuan Tseng, Ming Chyi Liu | 2021-01-19 |
| 10867792 | High electron mobility transistor (HEMT) having an indium-containing layer and method of manufacturing the same | Chi-Ming Chen, Min-Chang Ching, Chen-Hao Chiang, Chung-Yi Yu, Chung-Chieh Hsu | 2020-12-15 |
| 10861896 | Capping structure to reduce dark current in image sensors | Chung-Yi Yu, Eugene Chen | 2020-12-08 |
| 10804101 | Semiconductor structure having sets of III-V compound layers and method of forming | Chi-Ming Chen, Chung-Yi Yu, Chia-Shiung Tsai | 2020-10-13 |
| 10755936 | Loading effect reduction through multiple coat-etch processes | Jin-Dah Chen, Ming-Feng Shieh, Han-Wei Wu, Yu-Hsien Lin, Stan Chen | 2020-08-25 |
| 10483386 | Semiconductor device, transistor having doped seed layer and method of manufacturing the same | Chi-Ming Chen, Chung-Yi Yu, Chia-Shiung Tsai, Ru-Liang Lee | 2019-11-19 |
| D847958 | Toilet | Shi-Kuan Chen, Wei-Jun Wang, Wen-Yi Chiu, Ruei-Hong Hong | 2019-05-07 |
| 10276392 | Loading effect reduction through multiple coat-etch processes | Jin-Dah Chen, Ming-Feng Shieh, Han-Wei Wu, Yu-Hsien Lin, Stan Chen | 2019-04-30 |
| 10147829 | Dielectric sidewall structure for quality improvement in Ge and SiGe devices | Chih-Ming Chen, Lee-Chuan Tseng, Ming Chyi Liu | 2018-12-04 |
| 10109736 | Superlattice buffer structure for gallium nitride transistors | Chi-Ming Chen, Chung-Yi Yu | 2018-10-23 |
| 10109729 | High electron mobility transistors | Chung-Yi Yu, Chi-Ming Chen, Chen-Hao Chiang | 2018-10-23 |
| 10079296 | High electron mobility transistor with indium nitride layer | Chen-Hao Chiang, Chi-Ming Chen, Min-Chang Ching, Chung-Yi Yu, Chia-Shiung Tsai +1 more | 2018-09-18 |
| 10074537 | Method of forming semiconductor structure having sets of III-V compound layers | Chi-Ming Chen, Chung-Yi Yu, Chia-Shiung Tsai | 2018-09-11 |
| 9899493 | High electron mobility transistor and method of forming the same | Chen-Hao Chiang, Han-Chin Chiu, Chi-Ming Chen, Chung-Yi Yu | 2018-02-20 |
| 9711604 | Loading effect reduction through multiple coat-etch processes | Jin-Dah Chen, Ming-Feng Shieh, Han-Wei Wu, Yu-Hsien Lin, Stan Chen | 2017-07-18 |
| 9660063 | Semiconductor structure having sets of III-V compound layers and method of forming the same | Chi-Ming Chen, Chung-Yi Yu, Chia-Shiung Tsai | 2017-05-23 |
| 9620362 | Seed layer structure for growth of III-V materials on silicon | Chi-Ming Chen, Chung-Yi Yu | 2017-04-11 |
| 9548376 | Method of manufacturing a semiconductor device including a barrier structure | Chi-Ming Chen, Chen-Hao Chiang, Chung-Yi Yu, Chia-Shiung Tsai, Xiaomeng Chen | 2017-01-17 |
| 9525054 | High electron mobility transistor and method of forming the same | Chen-Hao Chiang, Han-Chin Chiu, Chi-Ming Chen, Chung-Yi Yu | 2016-12-20 |