Issued Patents All Time
Showing 51–72 of 72 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9449919 | Semiconductor device, layout design and method for manufacturing a semiconductor device | Hsin Chang, Shiou-Fan Chen, Chwei-Ching Chiu, Yung-Huei Lee | 2016-09-20 |
| 9425330 | Metal oxide metal capacitor with slot vias | Chin-Shan Wang, Chien-Jung Wang | 2016-08-23 |
| 9356016 | Semiconductor device and method for manufacturing the same | Chin-Shan Wang, Shun-Yi Lee | 2016-05-31 |
| 8848374 | Method and structure for dissipating heat away from a resistor having neighboring devices and interconnects | Chin Chuan Peng, Tzu-Li Lee, Bi-Ling Lin, Bor-Jou Wei, Chien Shih Tsai | 2014-09-30 |
| 8755000 | Display panel with test shorting bar | — | 2014-06-17 |
| 8729705 | Seal ring structures with reduced moisture-induced reliability degradation | Chien-Jung Wang | 2014-05-20 |
| 8674508 | Seal ring structures with reduced moisture-induced reliability degradation | Chien-Jung Wang | 2014-03-18 |
| 8670102 | Display panel | Mien-Mien Cheng, Yi-Suei Liao, Chien-Feng Chiu | 2014-03-11 |
| 8648592 | Semiconductor device components and methods | Bi-Ling Lin, Ming-Hong Hsieh, Lee-Der Chen, Jiaw-Ren Shih, Chwei-Ching Chiu | 2014-02-11 |
| 8541264 | Method for forming semiconductor structure having protection layer for preventing laser damage | Kang-Cheng Lin, Tzu-Li Lee | 2013-09-24 |
| 8508503 | Touch panel and method of reducing noise coupled by a common voltage of a touch panel | Wen-Rei Guo, Ching-Hua Chuang | 2013-08-13 |
| 8379365 | Metal oxide metal capacitor with slot vias | Chin-Shan Wang, Chien-Jung Wang | 2013-02-19 |
| 8242576 | Protection layer for preventing laser damage on semiconductor devices | Kang-Cheng Lin, Tzu-Li Lee | 2012-08-14 |
| 8212330 | Process for improving the reliability of interconnect structures and resulting structure | Hsien-Wei Chen, Tzu-Li Lee | 2012-07-03 |
| 8208084 | Array substrate with test shorting bar and display panel thereof | — | 2012-06-26 |
| 8068577 | Pull-down control circuit and shift register of using same | Yi-Suei Liao | 2011-11-29 |
| 7893459 | Seal ring structures with reduced moisture-induced reliability degradation | Chien-Jung Wang | 2011-02-22 |
| 7816256 | Process for improving the reliability of interconnect structures and resulting structure | Hsien-Wei Chen, Tzu-Li Lee | 2010-10-19 |
| 7667289 | Fuse structure having a tortuous metal fuse line | Kang-Cheng Lin | 2010-02-23 |
| 7646207 | Method for measuring a property of interconnections and structure for the same | Chin Chuan Peng, Shou-Chung Lee, Chien-Jung Wang, Chien Shih Tsai, Bi-Ling Lin +1 more | 2010-01-12 |
| 7235424 | Method and apparatus for enhanced CMP planarization using surrounded dummy design | Hsien-Wei Chen, Hao-Yi Tsai, Hsueh-Chung Chen, Shin-Puu Jeng, Chih-Tao Lin +1 more | 2007-06-26 |
| 7135406 | Method for damascene formation using plug materials having varied etching rates | Ying-Jen Kao, Jye-Yen Cheng | 2006-11-14 |