Issued Patents All Time
Showing 51–59 of 59 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8592923 | Coupling well structure for improving HVMOS performance | Chen-Bau Wu, Weng-Chu Chu, Tsung-Yi Huang, Fu-Jier Fan | 2013-11-26 |
| 8507988 | High voltage devices, systems, and methods for forming the high voltage devices | Chih-Wen Yao, Robert S. J. Pan, Ruey-Hsin Liu, Puo-Yu Chiang, Chi-Chih Chen +1 more | 2013-08-13 |
| 8461647 | Semiconductor device having multi-thickness gate dielectric | Ruey-Hsin Liu, Chih-Wen Yao, Hsiao-Chin Tuan | 2013-06-11 |
| 8049295 | Coupling well structure for improving HVMOS performance | Chen-Bau Wu, Weng-Chu Chu, Tsung-Yi Huang, Fu-Jier Fan | 2011-11-01 |
| 7888767 | Structures of high-voltage MOS devices with improved electrical performance | Kun-Ming Huang, Weng-Chu Chu, Chen-Bau Wu | 2011-02-15 |
| 7816214 | Coupling well structure for improving HVMOS performance | Chen-Bau Wu, Weng-Chu Chu, Tsung-Yi Huang, Fu-Jier Fan | 2010-10-19 |
| 7494830 | Method and device for wafer backside alignment overlay accuracy | Sheng-Chieh Liu, Tzu-Yang Wu, Ya-Wen Lee, Jeffery Chu, Chia-Hung Kao | 2009-02-24 |
| 7456079 | EPI wafer and method of making the same | De-Fang Huang | 2008-11-25 |
| 6809886 | Method for manufacturing a combined solid immersion lens (SIL) and submicron aperture, and device thereof | Wensyang Hsu, Chung-Hao Tien | 2004-10-26 |