Issued Patents All Time
Showing 1–21 of 21 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12363938 | Cap structure coupled to source to reduce saturation current in HEMT device | Ming-Cheng Lin, Chun Lin Tsai, Haw-Yun Wu, Liang-Yu Su, Yun-Hsiang Wang | 2025-07-15 |
| 12100757 | Cap structure coupled to source to reduce saturation current in HEMT device | Ming-Cheng Lin, Chun Lin Tsai, Haw-Yun Wu, Liang-Yu Su, Yun-Hsiang Wang | 2024-09-24 |
| 11742419 | Cap structure coupled to source to reduce saturation current in HEMT device | Ming-Cheng Lin, Chun Lin Tsai, Haw-Yun Wu, Liang-Yu Su, Yun-Hsiang Wang | 2023-08-29 |
| 11195945 | Cap structure coupled to source to reduce saturation current in HEMT device | Ming-Cheng Lin, Chun Lin Tsai, Haw-Yun Wu, Liang-Yu Su, Yun-Hsiang Wang | 2021-12-07 |
| 11139290 | High voltage cascode HEMT device | Ming-Cheng Lin, Chun Lin Tsai, Haw-Yun Wu | 2021-10-05 |
| 9111957 | Coupling well structure for improving HVMOS performance | Hsueh-Liang Chou, Weng-Chu Chu, Tsung-Yi Huang, Fu-Jier Fan | 2015-08-18 |
| 8592923 | Coupling well structure for improving HVMOS performance | Hsueh-Liang Chou, Weng-Chu Chu, Tsung-Yi Huang, Fu-Jier Fan | 2013-11-26 |
| 8114745 | High voltage CMOS devices | Chien-Shao Tang, Robin Hsieh, Ruey-Hsin Liu, Shun-Liang Hsu | 2012-02-14 |
| 8049295 | Coupling well structure for improving HVMOS performance | Hsueh-Liang Chou, Weng-Chu Chu, Tsung-Yi Huang, Fu-Jier Fan | 2011-11-01 |
| 7888767 | Structures of high-voltage MOS devices with improved electrical performance | Kun-Ming Huang, Hsueh-Liang Chou, Weng-Chu Chu | 2011-02-15 |
| 7816214 | Coupling well structure for improving HVMOS performance | Hsueh-Liang Chou, Weng-Chu Chu, Tsung-Yi Huang, Fu-Jier Fan | 2010-10-19 |
| 7719064 | High voltage CMOS devices | Chien-Shao Tang, Robin Hsieh, Ruey-Hsin Liu, Shun-Liang Hsu | 2010-05-18 |
| 7521342 | Semiconductor structure with high-voltage sustaining capability and fabrication method of the same | Fang-Cheng Lui, Shun-Liang Hsu | 2009-04-21 |
| 7482662 | High voltage semiconductor device utilizing a deep trench structure | Shun-Liang Hsu, You-Kuo Wu, Yu-Chang Jong | 2009-01-27 |
| 7372104 | High voltage CMOS devices | Chien-Shao Tang, Robin Hsieh, Ruey-Hsin Liu, Shun-Liang Hsu | 2008-05-13 |
| 7279767 | Semiconductor structure with high-voltage sustaining capability and fabrication method of the same | Fang-Cheng Lui, Shun-Liang Hsu | 2007-10-09 |
| 7221021 | Method of forming high voltage devices with retrograde well | Kuo-Ming Wu, Ruey-Hsin Liu, Shun-Liang Hsu | 2007-05-22 |
| 7151296 | High voltage lateral diffused MOSFET device | Kuo-Ming Wu, Jiann-Tyng Tzeng | 2006-12-19 |
| 7129559 | High voltage semiconductor device utilizing a deep trench structure | Shun-Liang Hsu, You-Kuo Wu, Yu-Chang Jong | 2006-10-31 |
| 6265752 | Method of forming a HVNMOS with an N+ buried layer combined with N well and a structure of the same | Kou-Chio Liu, Jyh-Min Jiang, Ruey-Hsin Liou | 2001-07-24 |
| 5899738 | Method for making metal plugs in stacked vias for multilevel interconnections and contact openings while retaining the alignment marks without requiring extra masking steps | Shie-Sen Peng | 1999-05-04 |