Issued Patents All Time
Showing 201–225 of 414 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7224068 | Stable metal structure with tungsten plug | Syun-Ming Jang | 2007-05-29 |
| 7221584 | MRAM cell having shared configuration | Chi-Wen Liu, Kuo-Ching CHIANG, Denny Tang | 2007-05-22 |
| 7183617 | Magnetic shielding for magnetically sensitive semiconductor devices | Chao-Hsiung Wang, Denny Tang | 2007-02-27 |
| 7180572 | Immersion optical projection system | Jen-Chieh Shih, Burn Jeng Lin, Tsai-Sheng Gau, Ru-Gun Liu, Chun-Kuang Chen +1 more | 2007-02-20 |
| 7180193 | Via recess in underlying conductive line | Chung-Shi Liu, Chen-Hua Yu | 2007-02-20 |
| 7173305 | Self-aligned contact for silicon-on-insulator devices | Fu-Liang Yang, Yee-Chia Yeo, Chenming Hu | 2007-02-06 |
| 7105928 | Copper wiring with high temperature superconductor (HTS) layer | Chen-Hua Yu, Chenming Hu, Chao-Hsiung Wang | 2006-09-12 |
| 7049702 | Damascene structure at semiconductor substrate level | — | 2006-05-23 |
| 6977218 | Method for fabricating copper interconnects | Chen-Hua Yu | 2005-12-20 |
| 6958291 | Interconnect with composite barrier layers and method for fabricating the same | Chen-Hua Yu, Syun-Ming Jang, Chenming Hu | 2005-10-25 |
| 6897510 | MIM capacitor having a high-dielectric-constant interelectrode insulator and a method of fabrication | — | 2005-05-24 |
| 6847098 | Non-floating body device with enhanced performance | Jyh-Chyurn Guo, Chenming Hu, Da-Chi Lin | 2005-01-25 |
| 6841466 | Method of selectively making copper using plating technology | Chen-Hua Yu | 2005-01-11 |
| 6797574 | Method of fabricating W/TiN gate for MOSFETS | — | 2004-09-28 |
| 6791142 | Stacked-gate flash memory and the method of making the same | — | 2004-09-14 |
| 6730958 | Nonvolatile memory device with reduced floating gate and increased coupling ratio and manufacturing method thereof | — | 2004-05-04 |
| 6717224 | Flash memory cell and method for fabricating a flash | — | 2004-04-06 |
| 6677224 | Method of forming stacked gate for flash memories | — | 2004-01-13 |
| 6642570 | Structure of flash memory with high coupling ratio | — | 2003-11-04 |
| 6638794 | Method for fabricating an anti-fuse in programmable interconnections | — | 2003-10-28 |
| 6627515 | Method of fabricating a non-floating body device with enhanced performance | Jyh-Chyurn Guo, Chenming Hu, Da-Chi Lin | 2003-09-30 |
| 6620526 | Method of making a dual damascene when misalignment occurs | — | 2003-09-16 |
| 6620687 | Method of making non-volatile memory with sharp corner | — | 2003-09-16 |
| 6596589 | Method of manufacturing a high coupling ratio stacked gate flash memory with an HSG-SI layer | — | 2003-07-22 |
| 6589840 | Nonvolatile memory device with reduced floating gate and increased coupling ratio and manufacturing method thereof | — | 2003-07-08 |