Issued Patents All Time
Showing 76–100 of 137 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 10050621 | Low static current semiconductor device | Chan-Hong Chern, Chu Fu Chen, Mark Chen, King-Yuen Wong, Ming-Cheng Lin +1 more | 2018-08-14 |
| 10050117 | Method of forming a high electron mobility transistor | Chun-Wei Hsu, Jiun-Lei Jerry Yu, Fu-Wei Yao, Chen-Ju Yu, Fu-Chih Yang | 2018-08-14 |
| 10014291 | SiC crystalline on Si substrates to allow integration of GaN and Si electronics | Kong-Beng Thei, Jiun-Lei Jerry Yu, Hsiao-Chin Tuan, Alex Kalnitsky | 2018-07-03 |
| 9985103 | Method of forming high electron mobility transistor | Fu-Wei Yao, Chen-Ju Yu, King-Yuen Wong, Chun-Wei Hsu, Jiun-Lei Jerry Yu +1 more | 2018-05-29 |
| 9941268 | Series resistor over drain region in high voltage device | Ker Hsiao Huo, Fu-Chih Yang, Yi-Min Chen, Chih-Yuan Chan | 2018-04-10 |
| 9812562 | Semiconductor structure, HEMT structure and method of forming the same | Yao-Chung Chang, Po-Chih Chen, Jiun-Lei Jerry Yu | 2017-11-07 |
| 9793389 | Apparatus and method of fabrication for GaN/Si transistors isolation | Chan-Hong Chern, Mark Chen, King-Yuen Wong | 2017-10-17 |
| 9793385 | Insulated gate bipolar transistor structure having low substrate leakage | Ker Hsiao Huo, Fu-Chih Yang, Jen-Hao Yeh, Chih-Chang Cheng, Ru-Yi Su | 2017-10-17 |
| 9722065 | Semiconductor device | Yu-Syuan Lin, Jiun-Lei Jerry Yu, Ming-Cheng Lin | 2017-08-01 |
| 9704968 | Method of forming a high electron mobility transistor | Chun-Wei Hsu, Jiun-Lei Jerry Yu, Fu-Wei Yao, Chen-Ju Yu, Fu-Chih Yang | 2017-07-11 |
| 9680009 | High voltage semiconductor device | Karthick Murukesan, Yi-Cheng Chiu, Hung-Chou Lin, Chih-Yuan Chan, Yi-Min Chen +3 more | 2017-06-13 |
| 9673323 | Embedded JFETs for high voltage applications | Jen-Hao Yeh, Chih-Chang Cheng, Ru-Yi Su, Ker Hsiao Huo, Po-Chih Chen +1 more | 2017-06-06 |
| 9660108 | Bootstrap MOS for high voltage applications | Jen-Hao Yeh, Chih-Chang Cheng, Ru-Yi Su, Ker Hsiao Huo, Po-Chih Chen +1 more | 2017-05-23 |
| 9627275 | Hybrid semiconductor structure on a common substrate | Man-Ho Kwan, Fu-Wei Yao, Ru-Yi Su, Alexander Kalnitsky | 2017-04-18 |
| 9601585 | Transistor having a wing region | Chen-Liang Chu, Fei-Yuh Chen, Yi-Sheng Chen, Shih-Kuang Hsiao, Kong-Beng Thei | 2017-03-21 |
| 9570598 | Method of forming a semiconductor structure | Po-Chih Chen, Chun-Wei Hsu, Fu-Chih Yang, Fu-Wei Yao, Jiun-Lei Jerry Yu | 2017-02-14 |
| 9508807 | Method of forming high electron mobility transistor | Fu-Wei Yao, Chen-Ju Yu, King-Yuen Wong, Chun-Wei Hsu, Jiun-Lei Jerry Yu +1 more | 2016-11-29 |
| 9391195 | High side gate driver device | Ru-Yi Su, Fu-Chih Yang, Ker Hsiao Huo, Chih-Chang Cheng, Ruey-Hsin Liu | 2016-07-12 |
| 9385178 | High voltage resistor with PIN diode isolation | Ru-Yi Su, Fu-Chih Yang, Chih-Chang Cheng, Ruey-Hsin Liu | 2016-07-05 |
| 9379188 | Insulated gate bipolar transistor structure having low substrate leakage | Ker Hsiao Huo, Chih-Chang Cheng, Fu-Chih Yang, Jen-Hao Yeh, Ru-Yi Su | 2016-06-28 |
| 9379191 | High electron mobility transistor including an isolation region | Chun-Wei Hsu, Jiun-Lei Jerry Yu, Fu-Wei Yao, Chen-Ju Yu, Fu-Chih Yang | 2016-06-28 |
| 9373619 | High voltage resistor with high voltage junction termination | Ru-Yi Su, Fu-Chih Yang, Chih-Chang Cheng, Ruey-Hsin Liu | 2016-06-21 |
| 9343542 | Method for fabricating enhancement mode transistor | Alexander Kalnitsky, Chih-Wen Hsiung | 2016-05-17 |
| 9331195 | Source tip optimization for high voltage transistor devices which includes a P-body extension region | Ru-Yi Su, Fu-Chih Yang, Chih-Chang Cheng, Ruey-Hsin Liu | 2016-05-03 |
| 9306012 | Strip-ground field plate | Ru-Yi Su, Po-Chih Chen, Ming-Cheng Lin, Fu-Chih Yang | 2016-04-05 |