Issued Patents All Time
Showing 1–25 of 37 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 12417332 | Integrated circuit, system for and method of forming an integrated circuit | Jung-Chan Yang, Ting-Wei Chiang, Hui-Zhong Zhuang, Chi-Yu Lu, Stefan Rusu | 2025-09-16 |
| 12211793 | Standard-cell layout structure with horn power and smart metal cut | Ni-Wan Fan, Ting-Wei Chiang, Jung-Chan Yang, Hsiang-Jen Tseng, Lipen Yuan +1 more | 2025-01-28 |
| 12159899 | Semiconductor device | Jung-Chan Yang, Hui-Zhong Zhuang, Chih-Liang Chen, Ting-Wei Chiang, Kuo-Nan Yang | 2024-12-03 |
| 12125839 | Semiconductor device and layout thereof | Ting-Wei Chiang, Shih-Chi Fu, Sheng-Fang Cheng, Jung-Chan Yang | 2024-10-22 |
| 12073170 | Integrated circuit, system for and method of forming an integrated circuit | Jung-Chan Yang, Ting-Wei Chiang, Hui-Zhong Zhuang, Chi-Yu Lu, Stefan Rusu | 2024-08-27 |
| 11735625 | Semiconductor device | Jung-Chan Yang, Hui-Zhong Zhuang, Chih-Liang Chen, Ting-Wei Chiang, Kuo-Nan Yang | 2023-08-22 |
| 11727544 | Constructing images of users' faces by stitching non-overlapping images | Madhu Sudan Athreya, William J. Allen | 2023-08-15 |
| 11704465 | Integrated circuit, system for and method of forming an integrated circuit | Jung-Chan Yang, Ting-Wei Chiang, Hui-Zhong Zhuang, Chi-Yu Lu, Stefan Rusu | 2023-07-18 |
| 11437321 | Standard-cell layout structure with horn power and smart metal cut | Ni-Wan Fan, Ting-Wei Chiang, Jung-Chan Yang, Hsiang-Jen Tseng, Lipen Yuan +1 more | 2022-09-06 |
| 11294286 | Pattern formation method using a photo mask for manufacturing a semiconductor device | Ru-Gun Liu, Chin-Hsiang Lin, Chih-Ming Lai, Chien-Wen Lai, Ken-Hsien Hsieh +2 more | 2022-04-05 |
| 11228709 | Constructing images of users' faces by stitching non-overlapping images | Madhu Sudan Athreya, William J. Allen | 2022-01-18 |
| 10923426 | Standard-cell layout structure with horn power and smart metal cut | Ni-Wan Fan, Ting-Wei Chiang, Jung-Chan Yang, Hsiang-Jen Tseng, Lipen Yuan +1 more | 2021-02-16 |
| 10854499 | Integrated circuit, system for and method of forming an integrated circuit | Jung-Chan Yang, Ting-Wei Chiang, Hui-Zhong Zhuang, Chi-Yu Lu, Stefan Rusu | 2020-12-01 |
| 10854593 | Semiconductor device and layout thereof | Ting-Wei Chiang, Shih-Chi Fu, Sheng-Fang Cheng, Jung-Chan Yang | 2020-12-01 |
| 10672708 | Standard-cell layout structure with horn power and smart metal cut | Ni-Wan Fan, Ting-Wei Chiang, Jung-Chan Yang, Hsiang-Jen Tseng, Lipen Yuan +1 more | 2020-06-02 |
| 10163882 | Semiconductor device and layout thereof | Ting-Wei Chiang, Shih-Chi Fu, Sheng-Fang Cheng, Jung-Chan Yang | 2018-12-25 |
| 10128234 | Electromigration resistant semiconductor device | Ni-Wan Fan, Sheng-Hsiung Chen, Jung-Chan Yang, Hsiang-Jen Tseng, Chi-Yu Lu | 2018-11-13 |
| 9659141 | EDA tool and method for conflict detection during multi-patterning lithography | Yen-Hung Lin, Chin-Chang Hsu, Hung-Lung Lin | 2017-05-23 |
| 9563731 | Cell boundaries for self aligned multiple patterning abutments | Chin-Hsiung Hsu, Li-Chun Tien, Pin-Dai Sue, Ching-Hsiang Chang, Wen-Hao Chen | 2017-02-07 |
| 9262558 | RC extraction for single patterning spacer technique | Hsiao-Shu Chao, Yi-Kan Cheng | 2016-02-16 |
| 9223922 | Semiconductor device design method | Ping-Hung Yuh, Chung-Hsing Wang | 2015-12-29 |
| 9213795 | Multiple via connections using connectivity rings | Chin-Hsiung Hsu, Huang-Yu Chen, Li-Chun Tien, Lee-Chung Lu, Hui-Zhong Zhuang +2 more | 2015-12-15 |
| 9141752 | EDA tool and method for conflict detection during multi-patterning lithography | Yen-Hung Lin, Chin-Chang Hsu, Hung-Lung Lin | 2015-09-22 |
| 8990762 | Semiconductor device design method, system and computer program product | Ping-Hung Yuh, Chung-Hsing Wang | 2015-03-24 |
| 8949758 | Hybrid design rule for double patterning | Wen-Hao Chen, Wen-Chun Huang | 2015-02-03 |