Issued Patents All Time
Showing 26–37 of 37 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 8813016 | Multiple via connections using connectivity rings | Chin-Hsiung Hsu, Huang-Yu Chen, Li-Chun Tien, Lee-Chung Lu, Hui-Zhong Zhuang +2 more | 2014-08-19 |
| 8769451 | Semiconductor device design method, system and computer program product | Ping-Hung Yuh, Chung-Hsing Wang | 2014-07-01 |
| 8728915 | Wafer laser-making method and die fabricated using the same | Yu-Pin Tsai, Yao-Hui Hu | 2014-05-20 |
| 8732641 | Pattern matching based parasitic extraction with pattern reuse | Ping-Hung Yuh, Hsin-Yun Lin, Chung-Hsing Wang | 2014-05-20 |
| 8726212 | Streamlined parasitic modeling with common device profile | Chung-Hsing Wang, Hsiao-Shu Chao | 2014-05-13 |
| 8627243 | Methods for optimizing conductor patterns for ECP and CMP in semiconductor processing | Chi-Feng Lin, Yu-Wei Chou, Wen-Cheng Huang, Ching-Hua Hsieh | 2014-01-07 |
| 8448120 | RC extraction for single patterning spacer technique | Hsiao-Shu Chao, Yi-Kan Cheng | 2013-05-21 |
| 7253662 | Method for forming an electric device comprising power switches around a logic circuit and related apparatus | Yu-Wen Tsai | 2007-08-07 |
| 7165232 | I/O circuit placement method and semiconductor device | Wang Chen, Chen-Teng Fan, Ya Yun Liu | 2007-01-16 |
| 6978411 | Memory test system for peak power reduction | Chen-Teng Fan, Wang Chen, Jyh-Herny Wang | 2005-12-20 |
| 6895540 | Mux scan cell with delay circuit for reducing hold-time violations | Wang Chen, Chen-Teng Fan | 2005-05-17 |
| 6872091 | Coaxial electrical connector with a switching function | — | 2005-03-29 |