E. Henry Stevens — 19 Patents at Semitool

E. Henry Stevens has been granted 19 US patents while listed as an inventor at Semitool. The first was granted in 1988 and the most recent in December 2008. E. Henry Stevens ranks #229,345 of 4,157,543 US inventors in our database (top 5.5%). Patent records list E. Henry Stevens in Colorado Springs, CO, US.

Patents per Year

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Showing 1–19 of 19 patents

Patent #	Title	Co-Inventors	Date	Approx Value ⓘ
7462269	Method for low temperature annealing of metallization micro-structures in the production of a microelectronic device	Thomas Ritzdorf, Linlin Chen, Lyndon Graham, Curt Dundas	2008-12-09	$1,766,000
7001471	Method and apparatus for low-temperature annealing of metallization microstructures in the production of a microelectronic device	Thomas Ritzdorf, Linlin Chen, Lyndon Graham, Curt Dundas	2006-02-21	$1,432,000
6994776	Method and apparatus for low temperature annealing of metallization micro-structure in the production of a microelectronic device	Thomas Ritzdorf, Linlin Chen, Lyndon Graham, Curt Dundas	2006-02-07	$3,397,000
6887789	Process and manufacturing tool architecture for use in the manufacture of one or more protected metallization structures on a workpiece	—	2005-05-03	$3,347,000
6664197	Process for etching thin-film layers of a workpiece used to form microelectronic circuits or components	Richard Pfeiffer	2003-12-16	$2,508,000
6508920	Apparatus for low-temperature annealing of metallization microstructures in the production of a microelectronic device	Thomas Ritzdorf, Linlin Chen, Lyndon Graham, Curt Dundas	2003-01-21	$2,863,000
6451114	Apparatus for application of chemical process to a workpiece	—	2002-09-17
6376374	Process and manufacturing tool architecture for use in the manufacturing of one or more protected metallization structures on a workpiece	—	2002-04-23	$3,076,000
6331490	Process for etching thin-film layers of a workpiece used to form microelectric circuits or components	Richard Pfeiffer	2001-12-18	$6,252,000
6143126	Process and manufacturing tool architecture for use in the manufacture of one or more metallization levels on an integrated circuit	—	2000-11-07	$7,605,000
6120641	Process architecture and manufacturing tool sets employing hard mask patterning for use in the manufacture of one or more metallization levels on a workpiece	Robert W. Berner	2000-09-19	$8,529,000
5741721	Method of forming capacitors and interconnect lines	—	1998-04-21
5610099	Process for fabricating transistors using composite nitride structure	Richard A. Bailey, Thomas C. Taylor	1997-03-11	$3,947,000
5508881	Capacitors and interconnect lines for use with integrated circuits	—	1996-04-16
5385634	Sealed self aligned contact process	Douglas Butler, Richard A. Bailey, Thomas C. Taylor	1995-01-31	$1,798,000
5170242	Reaction barrier for a multilayer structure in an integrated circuit	Masahiro Maekawa	1992-12-08
5070036	Process for contacting and interconnecting semiconductor devices within an integrated circuit	—	1991-12-03
4977440	Structure and process for contacting and interconnecting semiconductor devices within an integrated circuit	—	1990-12-11
4784973	Semiconductor contact silicide/nitride process with control for silicide thickness	Paul J. McClure, Christopher W. Hill	1988-11-15

E. Henry Stevens — 19 Patents

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