ES

E. Henry Stevens

SE Semitool: 10 patents #34 of 141Top 25%
RI Ramtron International: 2 patents #33 of 82Top 45%
IL Inmos Limited: 1 patents #44 of 90Top 50%
NS Nippon Steel Semiconductor: 1 patents #17 of 41Top 45%
NC Nmb Semiconductor Company: 1 patents #4 of 17Top 25%
RA Ramtron: 1 patents #8 of 21Top 40%
Overall (All Time): #241,708 of 4,157,543Top 6%
19
Patents All Time

Issued Patents All Time

Patent #TitleCo-InventorsDate
7462269 Method for low temperature annealing of metallization micro-structures in the production of a microelectronic device Thomas Ritzdorf, Linlin Chen, Lyndon Graham, Curt Dundas 2008-12-09
7001471 Method and apparatus for low-temperature annealing of metallization microstructures in the production of a microelectronic device Thomas Ritzdorf, Linlin Chen, Lyndon Graham, Curt Dundas 2006-02-21
6994776 Method and apparatus for low temperature annealing of metallization micro-structure in the production of a microelectronic device Thomas Ritzdorf, Linlin Chen, Lyndon Graham, Curt Dundas 2006-02-07
6887789 Process and manufacturing tool architecture for use in the manufacture of one or more protected metallization structures on a workpiece — 2005-05-03
6664197 Process for etching thin-film layers of a workpiece used to form microelectronic circuits or components Richard Pfeiffer 2003-12-16
6508920 Apparatus for low-temperature annealing of metallization microstructures in the production of a microelectronic device Thomas Ritzdorf, Linlin Chen, Lyndon Graham, Curt Dundas 2003-01-21
6451114 Apparatus for application of chemical process to a workpiece — 2002-09-17
6376374 Process and manufacturing tool architecture for use in the manufacturing of one or more protected metallization structures on a workpiece — 2002-04-23
6331490 Process for etching thin-film layers of a workpiece used to form microelectric circuits or components Richard Pfeiffer 2001-12-18
6143126 Process and manufacturing tool architecture for use in the manufacture of one or more metallization levels on an integrated circuit — 2000-11-07
6120641 Process architecture and manufacturing tool sets employing hard mask patterning for use in the manufacture of one or more metallization levels on a workpiece Robert W. Berner 2000-09-19
5741721 Method of forming capacitors and interconnect lines — 1998-04-21
5610099 Process for fabricating transistors using composite nitride structure Richard A. Bailey, Thomas C. Taylor 1997-03-11
5508881 Capacitors and interconnect lines for use with integrated circuits — 1996-04-16
5385634 Sealed self aligned contact process Douglas Butler, Richard A. Bailey, Thomas C. Taylor 1995-01-31
5170242 Reaction barrier for a multilayer structure in an integrated circuit Masahiro Maekawa 1992-12-08
5070036 Process for contacting and interconnecting semiconductor devices within an integrated circuit — 1991-12-03
4977440 Structure and process for contacting and interconnecting semiconductor devices within an integrated circuit — 1990-12-11
4784973 Semiconductor contact silicide/nitride process with control for silicide thickness Paul J. McClure, Christopher W. Hill 1988-11-15