Issued Patents All Time
Showing 1–25 of 28 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7916567 | Twin cell architecture for integrated circuit dynamic random access memory (DRAM) devices and those devices incorporating embedded DRAM | Michael C. Parris | 2011-03-29 |
| 7609570 | Switched capacitor charge sharing technique for integrated circuit devices enabling signal generation of disparate selected signal values | Michael C. Parris, Kim C. Hardee | 2009-10-27 |
| 7583110 | High-speed, low-power input buffer for integrated circuit devices | — | 2009-09-01 |
| 7515494 | Refresh period adjustment technique for dynamic random access memories (DRAM) and integrated circuit devices incorporating embedded DRAM | — | 2009-04-07 |
| 7506100 | Static random access memory (SRAM) compatible, high availability memory array and method employing synchronous dynamic random access memory (DRAM) in conjunction with a data cache and separate read and write registers and tag blocks | Oscar Frederick Jones, Jr., Michael C. Parris, Kim C. Hardee | 2009-03-17 |
| 7250795 | High-speed, low-power input buffer for integrated circuit devices | — | 2007-07-31 |
| 7110306 | Dual access DRAM | Michael C. Parris, Oscar Frederick Jones, Jr. | 2006-09-19 |
| 7099234 | Low power sleep mode operation technique for dynamic random access memory (DRAM) devices and integrated circuit devices incorporating embedded DRAM | Michael C. Parris, Oscar Frederick Jones, Jr. | 2006-08-29 |
| 7002874 | Dual word line mode for DRAMs | Michael C. Parris, Oscar Frederick Jones, Jr. | 2006-02-21 |
| 6912168 | Non-contiguous masked refresh for an integrated circuit memory | Michael C. Parris, Kim C. Hardee, Oscar Frederick Jones, Jr. | 2005-06-28 |
| 6815941 | Bandgap reference circuit | — | 2004-11-09 |
| 6518829 | Driver timing and circuit technique for a low noise charge pump circuit | — | 2003-02-11 |
| 6392304 | Multi-chip memory apparatus and associated method | — | 2002-05-21 |
| 6337278 | Technique for forming a borderless overlapping gate and diffusion contact structure in integrated circuit device processing | — | 2002-01-08 |
| 6317007 | Delayed start oscillator circuit | Michael C. Parris | 2001-11-13 |
| 5811864 | Planarized integrated circuit product and method for making it | — | 1998-09-22 |
| 5680362 | Circuit and method for accessing memory cells of a memory device | Michael C. Parris, Kim C. Hardee | 1997-10-21 |
| 5385634 | Sealed self aligned contact process | E. Henry Stevens, Richard A. Bailey, Thomas C. Taylor | 1995-01-31 |
| 5315230 | Temperature compensated voltage reference for low and wide voltage ranges | Michael V. Cordoba, Kim C. Hardee | 1994-05-24 |
| 5216281 | Self sealed aligned contact incorporating a dopant source | — | 1993-06-01 |
| 5162890 | Stacked capacitor with sidewall insulation | — | 1992-11-10 |
| 5104822 | Method for creating self-aligned, non-patterned contact areas and stacked capacitors using the method | — | 1992-04-14 |
| 5075817 | Trench capacitor for large scale integrated memory | — | 1991-12-24 |
| 5043790 | Sealed self aligned contacts using two nitrides process | — | 1991-08-27 |
| 4893272 | Ferroelectric retention method | S. Sheffield Eaton, Jr., Michael C. Parris | 1990-01-09 |