Issued Patents All Time
Showing 201–225 of 256 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7773403 | Spacer patterns using assist layer for high density semiconductor devices | James Kai, George Matamis, Tuan Pham, Takashi Orimoto | 2010-08-10 |
| 7755946 | Data state-based temperature compensation during sensing in non-volatile memory | Mohan Dunga | 2010-07-13 |
| 7737483 | Low resistance void-free contacts | — | 2010-06-15 |
| 7704832 | Integrated non-volatile memory and peripheral circuitry fabrication | James Kai, Tuan Pham, George Matamis, Takashi Orimoto | 2010-04-27 |
| 7691710 | Fabricating non-volatile memory with dual voltage select gate structure | Nima Mokhlesi | 2010-04-06 |
| 7672165 | Methods for active boosting to minimize capacitive coupling effect between adjacent gates of flash memory devices | Tuan Pham, Hao Fang, Gerrit Jan Hemink | 2010-03-02 |
| 7655536 | Methods of forming flash devices with shared word lines | — | 2010-02-02 |
| 7636260 | Method for operating non-volatile storage with individually controllable shield plates between storage elements | — | 2009-12-22 |
| 7615448 | Method of forming low resistance void-free contacts | — | 2009-11-10 |
| 7615445 | Methods of reducing coupling between floating gates in nonvolatile memory | Henry Chien, George Matamis, Tuan Pham, Hidetaka Horiuchi, Jeffrey W. Lutze +2 more | 2009-11-10 |
| 7616490 | Programming non-volatile memory with dual voltage select gate structure | Nima Mokhlesi | 2009-11-10 |
| 7592223 | Methods of fabricating non-volatile memory with integrated select and peripheral circuitry and post-isolation memory cell formation | Tuan Pham, Takashi Orimoto, James Kai, George Matamis | 2009-09-22 |
| 7592225 | Methods of forming spacer patterns using assist layer for high density semiconductor devices | James Kai, George Matamis, Tuan Pham, Takashi Orimoto | 2009-09-22 |
| 7586157 | Non-volatile memory with dual voltage select gate structure | Nima Mokhlesi | 2009-09-08 |
| 7582529 | Methods of fabricating non-volatile memory with integrated peripheral circuitry and pre-isolation memory cell formation | George Matamis, Takashi Orimoto, James Kai, Tuan Pham | 2009-09-01 |
| 7569465 | Use of voids between elements in semiconductor structures for isolation | Jian Chen | 2009-08-04 |
| 7541240 | Integration process flow for flash devices with low gap fill aspect ratio | Tuan Pham | 2009-06-02 |
| 7495294 | Flash devices with shared word lines | — | 2009-02-24 |
| 7482223 | Multi-thickness dielectric for semiconductor memory | Tuan Pham | 2009-01-27 |
| 7447086 | Selective program voltage ramp rates in non-volatile memory | Jun Wan, Jeffrey W. Lutze, Gerrit Jan Hemink, Ken Oowada, Jian Chen +1 more | 2008-11-04 |
| 7436019 | Non-volatile memory cells shaped to increase coupling to word lines | Jeffrey W. Lutze, Tuan Pham | 2008-10-14 |
| 7436709 | NAND flash memory with boosting | — | 2008-10-14 |
| 7436703 | Active boosting to minimize capacitive coupling effect between adjacent gates of flash memory devices | Tuan Pham, Hao Fang, Gerrit Jan Hemink | 2008-10-14 |
| 7430138 | Erasing non-volatile memory utilizing changing word line conditions to compensate for slower erasing memory cells | — | 2008-09-30 |
| 7403428 | Systems for erasing non-volatile memory utilizing changing word line conditions to compensate for slower erasing memory cells | — | 2008-07-22 |