Issued Patents All Time
Showing 101–108 of 108 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 9099496 | Method of forming an active area with floating gate negative offset profile in FG NAND memory | Ming Tian, Atsushi Suyama, James Kai, Raghuveer S. Makala, Yao-Sheng Lee +4 more | 2015-08-04 |
| 9030016 | Semiconductor device with copper interconnects separated by air gaps | Vinod R. Purayath, James Kai, Jarrett Jun Liang, George Matamis | 2015-05-12 |
| 9023719 | High aspect ratio memory hole channel contact formation | Johann Alsmeier, Raghuveer S. Makala, Yao-Sheng Lee | 2015-05-05 |
| 8987089 | Methods of fabricating a three-dimensional non-volatile memory device | Johann Alsmeier, Raghuveer S. Makala, Yao-Sheng Lee | 2015-03-24 |
| 8946023 | Method of making a vertical NAND device using sequential etching of multilayer stacks | Raghuveer S. Makala, Yao-Sheng Lee, Johann Alsmeier, Henry Chien | 2015-02-03 |
| 8778749 | Air isolation in high density non-volatile memory | Vinod R. Purayath, George Matamis | 2014-07-15 |
| 8575000 | Copper interconnects separated by air gaps and method of making thereof | Vinod R. Purayath, James Kai, Jarrett Jun Liang, George Matamis | 2013-11-05 |
| 8530297 | Process for fabricating non-volatile storage | Vinod R. Purayath | 2013-09-10 |