Issued Patents All Time
Showing 76–88 of 88 patents
| Patent # | Title | Co-Inventors | Date |
|---|---|---|---|
| 7719874 | Systems for controlled pulse operations in non-volatile memory | Roy E. Scheuerlein | 2010-05-18 |
| 7706169 | Large capacity one-time programmable memory cell using metal oxides | — | 2010-04-27 |
| 7660181 | Method of making non-volatile memory cell with embedded antifuse | S. Brad Herner | 2010-02-09 |
| 7618850 | Method of making a diode read/write memory cell in a programmed state | S. Brad Herner | 2009-11-17 |
| 7566974 | Doped polysilicon via connecting polysilicon layers | Michael Konevecki, Usha Raghuram, Maitreyee Mahajani, Sucheta Nallamothu, Andrew J. Walker | 2009-07-28 |
| 7553611 | Masking of repeated overlay and alignment marks to allow reuse of photomasks in a vertical structure | Yung-Tin Chen, Christopher J. Petti, Steven J. Radigan | 2009-06-30 |
| 7522448 | Controlled pulse operations in non-volatile memory | Roy E. Scheuerlein | 2009-04-21 |
| 7495947 | Reverse bias trim operations in non-volatile memory | Roy E. Scheuerlein | 2009-02-24 |
| 7492630 | Systems for reverse bias trim operations in non-volatile memory | Roy E. Scheuerlein | 2009-02-17 |
| 7447056 | Method for using a multi-use memory cell and memory array | Roy E. Scheuerlein | 2008-11-04 |
| 7177227 | Transistor layout configuration for tight-pitched memory array lines | Christopher J. Petti, Roy E. Scheuerlein, Abhijit Bandyopadhyay | 2007-02-13 |
| 7054219 | Transistor layout configuration for tight-pitched memory array lines | Christopher J. Petti, Roy E. Scheuerlein, Abhijit Bandyopadhyay | 2006-05-30 |
| 6306718 | Method of making polysilicon resistor having adjustable temperature coefficients | Varun Singh, Thomas E. Harrington, III, Roy Hensley, Allan T. Mitchell, Jack Qian | 2001-10-23 |