JH

Joseph H. Hassoun

Samsung: 30 patents #4,061 of 75,807Top 6%
AM AMD: 8 patents #1,491 of 9,279Top 20%
HP HP: 5 patents #8,774 of 16,619Top 55%
RA Rambus: 1 patents #410 of 549Top 75%
ST Stretch: 1 patents #7 of 15Top 50%
📍 Los Gatos, CA: #154 of 2,986 inventorsTop 6%
🗺 California: #9,798 of 386,348 inventorsTop 3%
Overall (All Time): #66,414 of 4,157,543Top 2%
44
Patents All Time

Issued Patents All Time

Showing 26–44 of 44 patents

Patent #TitleCo-InventorsDate
11681907 System and method for performing computations for deep neural networks Hamzah Ahmed Ali Abdelaziz, Ali Shafiee Ardestani 2023-06-20
11671111 Hardware channel-parallel data compression/decompression Ilia Ovsiannikov, Ali Shafiee Ardestani, Lei Wang 2023-06-06
11579842 Signed multiplication using unsigned multiplier with dynamic fine-grained operand isolation Ilia Ovsiannikov, Ali Shafiee Ardestani, Lei Wang 2023-02-14
11507817 System and method for performing computations for deep neural networks Hamzah Ahmed Ali Abdelaziz, Ali Shafiee Ardestani 2022-11-22
10963220 Signed multiplication using unsigned multiplier with dynamic fine-grained operand isolation Ilia Ovsiannikov, Ali Shafiee Ardestani, Lei Wang 2021-03-30
7317773 Double data rate flip-flop Steven P. Young, Suresh M. Menon, Ketan Sodha, Richard A. Carberry 2008-01-08
6820086 Forming linked lists using content addressable memory Sorin Iacobovici, William R. Bryg 2004-11-16
6777980 Double data rate flip-flop Steven P. Young, Suresh M. Menon, Ketan Sodha, Richard A. Carberry 2004-08-17
6744274 Programmable logic core adapter Jeffrey M. Arnold, Rafael C. Camarota, Charle' R. Rupp 2004-06-01
6587534 Delay lock loop with clock phase shifter F. Erich Goetting, John D. Logue 2003-07-01
6525565 Double data rate flip-flop Steven P. Young, Suresh M. Menon, Ketan Sodha, Richard A. Carberry 2003-02-25
6487648 SDRAM controller implemented in a PLD 2002-11-26
6289068 Delay lock loop with clock phase shifter F. Erich Goetting, John D. Logue 2001-09-11
6204710 Precision trim circuit for delay lines F. Erich Goetting, Paul G. Hyland 2001-03-20
6061418 Variable clock divider with selectable duty cycle 2000-05-09
5995967 Forming linked lists using content addressable memory Sorin Iacobovici, William R. Bryg 1999-11-30
5844913 Current mode interface circuitry for an IC test device James A. Gasbarro 1998-12-01
5737757 Cache tag system for use with multiple processors including the most recently requested processor identification Michael L. Ziegler, Robert D. Odineal 1998-04-07
5148516 Efficient computer terminal system utilizing a single slave processor 1992-09-15